Datasheet

LPC3220_30_40_50 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2.1 — 24 June 2014 58 of 80
NXP Semiconductors
LPC3220/30/40/50
16/32-bit ARM microcontrollers
[1] T
CLCL
= 1/HCLK
[2] Refer to the LPC32x0 User manual EMCStaticWaitOen0-3 register for the programming of WAITOEN value.
[3] Refer to the LPC32x0 User manual EMCStaticWaitRd0-3 register for the programming of WAITRD value.
[4] Refer to the LPC32x0 User manual EMCStaticWaitWen0-3 register for the programming of WAITWEN value.
[5] Refer to the LPC32x0 User manual EMCStaticWaitWr0-3 register for the programming of WAITWR value.
[6] Earliest of CS
HIGH, OE HIGH, address change to data invalid.
t
WELWEH
WE LOW to WE HIGH time
[4][5]
-(WAITWR WAITWEN + 1)  T
CLCL
-ns
t
BLSLBLSH
BLS LOW to BLS HIGH time
[4][5]
-(WAITWR WAITWEN + 1)  T
CLCL
-ns
t
WEHANV
WE HIGH to address invalid time - 1  T
CLCL
-ns
t
WEHDNV
WE HIGH to data invalid time - 1  T
CLCL
-ns
t
BLSHANV
BLS HIGH to address invalid time - 1  T
CLCL
-ns
t
BLSHDNV
BLS HIGH to data invalid time - 1  T
CLCL
-ns
Table 12. Dynamic characteristics: static external memory interface
…continued
C
L
=25pF, T
amb
=20  C, V
DD(EMC)
= 1.8 V, 2.5 V, or 3.3 V.
Symbol Parameter Notes Min Typ Max Unit
Fig 7. External memory read access
EMC_CS[3:0]
EMC_A[23:0]
EMC_D[31:0]
EMC_OE
EMC_BLS[3:0]
t
CSLAV
t
OELAV
t
OELOEH
t
CSLOEL
t
su(DQ)
t
h(DQ)
t
CSHOEH
t
OEHANV
002aae402
t
BLSLAV
t
CSHBLSH
t
BLSLBLSH
t
CSLBLSL
t
BLSHANV