Datasheet

LPC3220_30_40_50 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2.1 — 24 June 2014 6 of 80
NXP Semiconductors
LPC3220/30/40/50
16/32-bit ARM microcontrollers
6. Pinning information
6.1 Pinning
Fig 2. Pin configuration for SOT1048-1 (TFBGA296)
002aae398
Transparent top view
V
U
T
R
P
N
L
J
M
K
H
G
F
E
D
B
C
A
24681012
13
14
15 17
16 18
1357911
ball A1
index area
Table 3. Pin allocation table (TFBGA296)
Pin Symbol Pin Symbol Pin Symbol
Row A
A3 I2C2_SCL
A4 I2S1TX_CLK/MAT3[0] A5 I2C1_SCL A6 MS_BS/MAT2[1]
A7 MS_DIO1/MAT0[1] A8 MS_DIO0/MAT0[0] A9 SPI2_DATIO/MOSI1/LCDVD[20]
[1]
A10 SPI2_DATIN/MISO1/
LCDVD[21]
[1]
/GPI_27
A11 GPIO_1 A12 GPIO_0
A13 GPO_21/U4_TX/LCDVD[3]
[1]
A14 GPO_15/MCOA1/LCDFP
[1]
A15 GPO_7/LCDVD[2]
[1]
A16 GPO_6/LCDVD[18]
[1]
Row B
B2 GPO_20 B3 GPO_5
B4 I2S1TX_WS/CAP3[0] B5 P0[0]/I2S1RX_CLK B6 I2C1_SDA
B7 MS_SCLK/MAT2[0] B8 MS_DIO2/MAT0[2] B9 SPI1_DATIO/MOSI0/MCI2
B10 SPI2_CLK/SCK1/LCDVD[23]
[1]
B11 GPIO_4/SSEL1/LCDVD[22]
[1]
B12 GPO_12/MCOA2/LCDLE
[1]
B13 GPO_13/MCOB1/LCDDCLK
[1]
B14 GPO_2/MAT1[0]/LCDVD[0]
[1]
B15 GPI_19/U4_RX
B16 GPI_8/KEY_COL6/
SPI2_BUSY/ENET_RX_DV
[2]
B17 n.c.
Row C
C1 FLASH_RD
C2 GPO_19 C3 GPO_0/TST_CLK1
C4 USB_ATX_INT
C5 USB_SE0_VM/U5_TX C6 TST_CLK2
C7 GPI_6/HSTIM_CAP/
ENET_RXD2
[2]
C8 MS_DIO3/MAT0[3] C9 SPI1_CLK/SCK0