Datasheet

LPC3220_30_40_50 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2.1 — 24 June 2014 65 of 80
NXP Semiconductors
LPC3220/30/40/50
16/32-bit ARM microcontrollers
11.8 SLC NAND flash memory controller
Fig 15. MLC NAND flash controller write timing (writing to NAND flash)
Fig 16. MLC NAND flash controller read timing (reading from NAND flash)
t
WB
FLASH_IO[7:0]
FLASH_WR
t
WP
t
WC
FLASH_RDY (R/B)
FLASH_CE
D0 D1 Dn
10h
t
WH
002aae442
FLASH_IO[7:0]
t
RP
t
REH
t
RC
FLASH_RD
FLASH_CE
t
CELREL
D0 D1 D2 D3
t
RHZ
002aae443
Table 18. Dynamic characteristics of SLC NAND flash memory controller
T
amb
=  40  C to +85  C.
Symbol Parameter Conditions Min Typ Max Unit
t
ALS
ALE set-up time read
[1][2][4][6]
-T
HCLK
 (Rsu + Rw) - ns
write - T
HCLK
 (Wsu + Ww) - ns
t
ALH
ALE hold time read
[1][7]
-T
HCLK
 Rh - ns
write - T
HCLK
 Wh - ns
t
AR
ALE to RE delay time read
[1][2][6]
-T
HCLK
 Rsu - ns
write - T
HCLK
 Wsu - ns