Datasheet
LPC4350_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4.2 — 18 August 2014 151 of 155
NXP Semiconductors
LPC4350/30/20/10
32-bit ARM Cortex-M4/M0 microcontroller
Modifications: • Temperature range for simulated timing characteristics corrected to T
amb
= 40 C to
+85 C in Section 11 “Dynamic characteristics”.
• SPIFI timing added. See Section 11.15.
• SPIFI maximum data rate changed to 52 MB per second.
• Editorial updates.
• Figure 25 and Figure 26 updated for full temperature range.
• Section 7.23 “Serial Wire Debug/JTAG” updated.
• The following changes were made on the TFBGA180 pinout in Table 3:
– P1_13 moved from ball D6 to L8.
– P7_5 moved from ball C7 to A7.
– PF_4 moved from ball L8 to D6.
– RESET
moved from ball B7 to C7.
– RTCX2 moved from ball A7 to B7.
– Ball G10 changed from VSS to VDDIO.
LPC4350_30_20_10 v.3.4 20120904 Preliminary data sheet - LPC4350_30_20_10 v.3.3
Modifications:
• SSP0 boot pin functions corrected in Table 5 and Table 4. Pin P3_3 = SSP0_SCK, pin
P3_6 = SSP0_SSEL, pin P3_7 = SSP0_MISO, pin P3_8 = SSP0_MOSI.
• Minimum value for all supply voltages changed to -0.5 V in Table 6.
LPC4350_30_20_10 v.3.3 20120821 Preliminary data sheet - LPC4350_30_20_10 v.3.2
Modifications:
• Parameter t
wake
updated in Table 13 for wake-up from deep power-down mode and
reset.
• Dynamic characteristics of the SD/MMC controller updated in Table 28.
• Dynamic characteristics of the LCD controller updated in Table 29.
• Dynamic characteristics of the SSP controller updated in Table 21.
• Minimum value of V
I
for conditions “USB0 pins USB0_DP; USB0_DM;
USB0_VBUS”,“USB0 pins USB0_ID; USB0_RREF”, and “USB1 pins USB1_DP and
USB1_DM” changed to 0.3 V in Table 6.
• Parameters I
IL
and I
IH
renamed to I
LL
and I
LH
in Table 10.
• AES removed. AES is available on parts LPC43Sxx only.
• Pin configuration diagrams corrected for LQFP packages (Figure 5 and Figure 6).
• Figure 10 updated.
• All power consumption data updated in Table 10 and Section 10.1 “Power
consumption”.
• BOD levels updated in Table 12.
• SWD debug option removed for Cortex-M0 core.
LPC4350_30_20_10 v.3.2 20120604 Preliminary data sheet - LPC4350_30_20_10 v.3.1
LPC4350_30_20_10 v.3.1 20120105 Objective data sheet - LPC4350_30_20_10 v.3
LPC4350_30_20_10 v.3 20111205 Objective data sheet - LPC4350_30_20_10 v.2.1
LPC4350_30_20_10 v.2.1 20110923 Objective data sheet - LPC4350_30_20_10 v.2
LPC4350_30_20_10 v.2 20110714 Objective data sheet - LPC4350_30_20_10 v.1
LPC4350_30_20_10 v.1 20101029 Objective data sheet - -
Table 42. Revision history
…continued
Document ID Release date Data sheet status Change notice Supersedes