Datasheet

LPC435X_3X_2X_1X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 19 August 2014 119 of 158
NXP Semiconductors
LPC435x/3x/2x/1x
32-bit ARM Cortex-M4/M0 microcontroller
Fig 31. SSP in SPI mode and SPI slave timing
SCK (CPOL = 0)
MOSI
MISO
T
cy(clk)
t
DS
t
DH
t
v(Q)
DATA VALID DATA VALID
t
h(Q)
SCK (CPOL = 1)
DATA VALID
DATA VALID
MOSI
MISO
t
DS
t
DH
t
v(Q)
DATA VALID DATA VALID
t
h(Q)
DATA VALID
DATA VALID
CPHA = 1
CPHA = 0
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