Datasheet

LPC435X_3X_2X_1X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 19 August 2014 19 of 158
NXP Semiconductors
LPC435x/3x/2x/1x
32-bit ARM Cortex-M4/M0 microcontroller
P2_9 H16 B10 144 102
[2]
N;
PU
I/O GPIO1[10] — General purpose digital input/output pin. Boot
pin (see Table 5
).
O CTOUT_3 — SCT output 3. Match output 3 of timer 0.
I/O U3_BAUD — Baud pin for USART3.
I/O EMC_A0 — External memory address line 0.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
P2_10 G16 E8 146 104
[2]
N;
PU
I/O GPIO0[14] — General purpose digital input/output pin.
O CTOUT_2 — SCT output 2. Match output 2 of timer 0.
O U2_TXD — Transmitter output for USART2.
I/O EMC_A1 — External memory address line 1.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
P2_11 F16 A9 148 105
[2]
N;
PU
I/O GPIO1[11] — General purpose digital input/output pin.
O CTOUT_5 — SCT output 5. Match output 3 of timer 3.
I U2_RXD — Receiver input for USART2.
I/O EMC_A2 — External memory address line 2.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
P2_12 E15 B9 153 106
[2]
N;
PU
I/O GPIO1[12] — General purpose digital input/output pin.
O CTOUT_4 — SCT output 4. Match output 3 of timer 3.
- R — Function reserved.
I/O EMC_A3 — External memory address line 3.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
I/O U2_UCLK — Serial clock input/output for USART2 in
synchronous mode.
Table 3. Pin description
…continued
Pin name
LBGA256 TFBGA100 LQFP208 LQFP144 Reset state [1] Type
Description