Datasheet

LPC435X_3X_2X_1X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 19 August 2014 28 of 158
NXP Semiconductors
LPC435x/3x/2x/1x
32-bit ARM Cortex-M4/M0 microcontroller
P6_0 M12 H7 105 73
[2]
N;
PU
- R — Function reserved.
O I2S0_RX_MCLK — I2S receive master clock.
- R — Function reserved.
- R — Function reserved.
I/O I2S0_RX_SCK — Receive Clock. It is driven by the master
and received by the slave. Corresponds to the signal SCK in
the I
2
S-bus specification.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
P6_1 R15 G5 107 74
[2]
N;
PU
I/O GPIO3[0] — General purpose digital input/output pin.
O EMC_DYCS1
— SDRAM chip select 1.
I/O U0_UCLK — Serial clock input/output for USART0 in
synchronous mode.
I/O I2S0_RX_WS — Receive Word Select. It is driven by the
master and received by the slave. Corresponds to the signal
WS in the I
2
S-bus specification.
- R — Function reserved.
I T2_CAP0 — Capture input 2 of timer 2.
- R — Function reserved.
- R — Function reserved.
P6_2 L13 J9 111 78
[2]
N;
PU
I/O GPIO3[1] — General purpose digital input/output pin.
O EMC_CKEOUT1 — SDRAM clock enable 1.
I/O U0_DIR — RS-485/EIA-485 output enable/direction control for
USART0.
I/O I2S0_RX_SDA — I2S Receive data. It is driven by the
transmitter and read by the receiver. Corresponds to the signal
SD in the I
2
S-bus specification.
- R — Function reserved.
I T2_CAP1 — Capture input 1 of timer 2.
- R — Function reserved.
- R — Function reserved.
Table 3. Pin description
…continued
Pin name
LBGA256 TFBGA100 LQFP208 LQFP144 Reset state [1] Type
Description