Datasheet

LPC435X_3X_2X_1X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 19 August 2014 35 of 158
NXP Semiconductors
LPC435x/3x/2x/1x
32-bit ARM Cortex-M4/M0 microcontroller
P8_6 K3 - 43 -
[2]
N;
PU
I/O GPIO4[6] — General purpose digital input/output pin.
I USB1_ULPI_NXT — ULPI link NXT signal. Data flow control
signal from the PHY.
- R — Function reserved.
O LCD_VD5 — LCD data.
O LCD_LP — Line synchronization pulse (STN). Horizontal
synchronization pulse (TFT).
- R — Function reserved.
- R — Function reserved.
I T0_CAP2 — Capture input 2 of timer 0.
P8_7 K1 - 45 -
[2]
N;
PU
I/O GPIO4[7] — General purpose digital input/output pin.
O USB1_ULPI_STP — ULPI link STP signal. Asserted to end or
interrupt transfers to the PHY.
- R — Function reserved.
O LCD_VD4 — LCD data.
O LCD_PWR — LCD panel power enable.
- R — Function reserved.
- R — Function reserved.
I T0_CAP3 — Capture input 3 of timer 0.
P8_8 L1 - 49 -
[2]
N;
PU
- R — Function reserved.
I USB1_ULPI_CLK — ULPI link CLK signal. 60 MHz clock
generated by the PHY.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
O CGU_OUT0 — CGU spare clock output 0.
O I2S1_TX_MCLK — I2S1 transmit master clock.
P9_0 T1 - 59 -
[2]
N;
PU
I/O GPIO4[12] — General purpose digital input/output pin.
O MCABORT
— Motor control PWM, LOW-active fast abort.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
I ENET_CRS — Ethernet Carrier Sense (MII interface).
I/O SGPIO0 — General purpose digital input/output pin.
I/O SSP0_SSEL — Slave Select for SSP0.
Table 3. Pin description
…continued
Pin name
LBGA256 TFBGA100 LQFP208 LQFP144 Reset state [1] Type
Description