Datasheet

LPC435X_3X_2X_1X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 19 August 2014 89 of 158
NXP Semiconductors
LPC435x/3x/2x/1x
32-bit ARM Cortex-M4/M0 microcontroller
8. Limiting values
[1] The following applies to the limiting values:
a) Absolute maximum ratings state the extreme limits that the product can withstand without leading to irrecoverable failure. Failure
includes the loss of reliability and shorter lifetime of the device. Conditions for functional operation of the part are shown in Table 11
Static characteristics.
b) This product includes circuitry designed for the protection of its internal devices from the damaging effects of excessive static
charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maximum.
c) Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to V
SS
unless
otherwise noted.
[2] Including voltage on outputs in 3-state mode.
[3] Dependent on package type.
[4] Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor.
Table 7. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
Symbol Parameter Conditions Min Max Unit
V
DD(REG)(3V3)
regulator supply voltage
(3.3 V)
on pin VDDREG 0.5 3.6 V
V
DD(IO)
input/output supply
voltage
on pin VDDIO 0.5 3.6 V
V
DDA(3V3)
analog supply voltage
(3.3 V)
on pin VDDA 0.5 3.6 V
V
BAT
battery supply voltage on pin VBAT 0.5 3.6 V
V
prog(pf)
polyfuse programming
voltage
on pin VPP 0.5 3.6 V
V
I
input voltage when V
DD(IO)
2.2 V
5 V tolerant digital I/O pins
[2]
0.5 5.5 V
ADC/DAC pins and digital I/O
pins configured for an analog
function
0.5 V
DDA(3V3)
V
USB0 pins USB0_DP;
USB0_DM;USB0_VBUS
0.3 5.25 V
USB0 pins USB0_ID;
USB0_RREF
0.3 3.6 V
USB1 pins USB1_DP and
USB1_DM
0.3 5.25 V
I
DD
supply current per supply pin - 100 mA
I
SS
ground current per ground pin - 100 mA
I
latch
I/O latch-up current (0.5V
DD(IO)
) < V
I
< (1.5V
DD(IO)
);
T
j
< 125 C
- 100 mA
T
stg
storage temperature
[3]
65 +150 C
P
tot(pack)
total power dissipation
(per package)
based on package heat transfer,
not device power consumption
-1.5W
V
ESD
electrostatic discharge
voltage
human body model; all pins
[4]
- 2000 V