Datasheet

LPC4350_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4.2 — 18 August 2014 112 of 155
NXP Semiconductors
LPC4350/30/20/10
32-bit ARM Cortex-M4/M0 microcontroller
11.10 SSP interface
Table 22. Dynamic characteristics: SSP pins in SPI mode
T
amb
=  40  C to +85  C; 2.2 V  V
DD(REG)(3V3)
 3.6 V; 2.7 V  V
DD(IO)
 3.6 V; C
L
= 20 pF. Simulated values.
Symbol Parameter Conditions Min Typ Max Unit
T
cy(clk)
clock cycle time full-duplex mode
[1]
-40-ns
when only transmitting - 20 - ns
SSP master
t
DS
data set-up time in SPI mode 13.3 - - ns
t
DH
data hold time in SPI mode 3.5 - - ns
t
v(Q)
data output valid
time
in SPI mode - - 6.0 ns
t
h(Q)
data output hold
time
in SPI mode - - 0 ns
t
lead
lead time continuous transfer mode
SPI mode; CPOL = 0;
CPHA = 0
T
cy(clk)
+ 3.2 - T
cy(clk)
+ 6.1 ns
SPI mode; CPOL = 0;
CPHA = 1
0.5T
cy(clk)
+ 3.2 - 0.5T
cy(clk)
+ 6.1 ns
SPI mode; CPOL = 1;
CPHA = 0
T
cy(clk)
+ 3.2 - T
cy(clk)
+ 6.1 ns
SPI mode; CPOL = 1;
CPHA = 1
0.5T
cy(clk)
+ 3.2 - 0.5T
cy(clk)
+ 6.1 ns
synchronous serial
frame mode
0.5T
cy(clk)
+ 3.2 - 0.5T
cy(clk)
+ 6.1 ns
microwire frame format T
cy(clk)
+ 3.2 - T
cy(clk)
+ 6.1 ns
t
lag
lag time continuous transfer mode
SPI mode; CPOL = 0;
CPHA = 0
0.5T
cy(clk)
-- ns
SPI mode; CPOL = 0;
CPHA = 1
T
cy(clk)
-- ns
SPI mode; CPOL = 1;
CPHA = 0
0.5T
cy(clk)
-- ns
SPI mode; CPOL = 1;
CPHA = 1
T
cy(clk)
-- ns
synchronous serial
frame mode
T
cy(clk)
-- ns
microwire frame format 0.5T
cy(clk)
-- ns