Datasheet
LPC4350_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4.2 — 18 August 2014 150 of 155
NXP Semiconductors
LPC4350/30/20/10
32-bit ARM Cortex-M4/M0 microcontroller
• Parameter I
LH
(High-level leakage current) for condition V
I
= 5 V changed to 20 nA
(max). See Table 10.
• Parameter V
DDA(3V3)
added for pins USB0_VDDA3V3_DRIVER and
USB0_VDDA3V3 in Table 10.
• SPI timing data added. See Table 22.
• SGPIO timing data added. See Table 23.
• SPI and SGPIO peripheral power consumption added in Table 11.
• Data sheet status changed to Product data sheet.
• Corrected max voltage on pins USB0_DP, USB0_DM, USB0_VBUS, USB1_DP, and
USB1_DM in Table 6 and Table 10 to be consistent with USB specifications.
LPC4350_30_20_10 v.3.7 20130131 Preliminary data sheet - LPC4350_30_20_10 v.3.6
Modifications:
• SGPIO and SPI location corrected in Figure 1.
• SGPIO-to-DMA connection corrected in Figure 7.
• Power consumption in active mode corrected. See parameter I
DD(REG)(3V3)
in Table 10
and graphs Figure 12, Figure 13, and Figure 14.
• Parameter name I
DD(ADC)
changed to I
DDA
in Table 10.
• Figure 21 “Band gap voltage for different temperatures and process conditions” and
Table 13 “Band gap characteristics” corrected.
• Added note to limit data in Table 24 “Dynamic characteristics: Static asynchronous
external memory interface” to single memory accesses.
• Value of parameter I
DD(REG)(3V3)
in deep power-down increased to 0.03 μA in
Table 10.
• Value of parameter I
DD(IO)
in deep power-down increased to 0.05 μA in Table 10.
LPC4350_30_20_10 v.3.6 20121119 Preliminary data sheet - LPC4350_30_20_10 v.3.5
Modifications:
• Table 13 “Band gap characteristics” added.
• Power consumption for M0 core added in Table 11 “Peripheral power consumption”.
• Section 7.22.10 “Power Management Controller (PMC)” added.
• Table 10, added Table note 2: “Dynamic characteristics for peripherals are provided
for V
DD(REG)(3V3)
2.7 V.”
• Description of ADC pins on digital/analog input pins changed. Each input to the ADC
is connected to ADC0 and ADC1. See Table 3.
• Use of C_CAN peripheral restricted in Section 2.
• ADC channels limited to a total of 8 channels shared between ADC0 and ADC1.
• Minimum value for parameter V
IL
changed to 0 V in Table 10 “Static characteristics”.
LPC4350_30_20_10 v.3.5 20121011 Preliminary data sheet - LPC4350_30_20_10 v.3.4
Table 42. Revision history
…continued
Document ID Release date Data sheet status Change notice Supersedes