Datasheet

LPC4350_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4.2 — 18 August 2014 77 of 155
NXP Semiconductors
LPC4350/30/20/10
32-bit ARM Cortex-M4/M0 microcontroller
The I
2
S-bus provides a standard communication interface for digital audio applications.
The I
2
S-bus specification defines a 3-wire serial bus using one data line, one clock line,
and one word select signal. The basic I
2
S-bus connection has one master, which is
always the master, and one slave. The I
2
S-bus interface provides a separate transmit and
receive channel, each of which can operate as either a master or a slave.
7.18.6.1 Features
The I
2
S interface has separate input/output channels, each of which can operate in
master or slave mode.
Capable of handling 8-bit, 16-bit, and 32-bit word sizes.
Mono and stereo audio data supported.
The sampling frequency can range from 16 kHz to 192 kHz (16, 22.05, 32, 44.1, 48,
96, 192) kHz.
Support for an audio master clock.
Configurable word select period in master mode (separately for I
2
S-bus input and
output).
Two 8-word FIFO data buffers are provided, one for transmit and one for receive.
Generates interrupt requests when buffer levels cross a programmable boundary.
Two DMA requests controlled by programmable buffer levels. The DMA requests are
connected to the GPDMA block.
Controls include reset, stop and mute options separately for I
2
S-bus input and I
2
S-bus
output.
7.18.7 C_CAN
Remark: The LPC4350/30/20/10 contain two C_CAN controllers.
Controller Area Network (CAN) is the definition of a high performance communication
protocol for serial data communication. The C_CAN controller is designed to provide a full
implementation of the CAN protocol according to the CAN Specification Version 2.0B. The
C_CAN controller can create powerful local networks with low-cost multiplex wiring by
supporting distributed real-time control with a high level of reliability.
7.18.7.1 Features
Conforms to protocol version 2.0 parts A and B.
Supports bit rate of up to 1 Mbit/s.
Supports 32 Message Objects.
Each Message Object has its own identifier mask.
Provides programmable FIFO mode (concatenation of Message Objects).
Provides maskable interrupts.
Supports Disabled Automatic Retransmission (DAR) mode for time-triggered CAN
applications.
Provides programmable loop-back mode for self-test operation.