Datasheet

LPC4370 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 21 October 2013 133 of 150
NXP Semiconductors
LPC4370
32-bit ARM Cortex-M4/M0 microcontroller
13.6 Reset pin configuration
The glitch filter rejects pulses of typical 12 ns width.
Fig 42. Standard I/O pin configuration with analog input
slew rate bit EHS
pull-up enable bit EPUN
pull-down enable bit EPD
glitch
filter
analog I/O
ESD
ESD
PIN
VDDIO
VSSIO
input buffer enable bit EZI
filter select bit ZIF
data input to core
data output from core
enable output driver
002aah028
Fig 43. Reset pin configuration
V
SS
reset
002aag702
V
ps
V
ps
V
ps
R
pu
ESD
ESD
20 ns RC
GLITCH FILTER
PIN