Datasheet

LPC4370 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 21 October 2013 134 of 150
NXP Semiconductors
LPC4370
32-bit ARM Cortex-M4/M0 microcontroller
13.7 Minimizing interference between digital signals and 12-bit ADC
signals
To reduce interference from digital signals to the high-speed 12-bit ADC inputs, do not
configure digital pins that are pinned out close to the ADC signals as outputs when using
the 12-bit ADC. For the BGA256 package, the pins with interfering signals are shown in
Table 42
.
13.8 12-bit ADCHS input selection
The high-speed, 12-bit ADCHS operates with an internally generated 1.2 V power supply.
The input range for an ADC channel is 800 mV (peak-to-peak) in a band from 0 V to 1.2 V.
The input range Vin_pos is defined by Vin_pos = Vin_neg +/- 400 mV where Vin_neg can
be either generated internally or supplied by the external pin ADCHS_NEG.
The internally generated reference voltage is Vin_neg = 500 mV making the allowed input
voltage Vin_pos on any ADC channel 100 mV  Vin_pos  900 mV. See Figure 44
.
Table 42. 12-bit ADC signal interferences for BGA256 package
12-bit ADC signal LBGA256
ball
Interfering pins LBGA256 ball
ADCHS_0 E3 P4_3, PC_0 C2, D4
ADCHS_1 C3 P4_1, P8_0, PC_0 A1, E5, D4
ADCHS_2 A4 PF_10, PF_11 A3, A2
ADCHS_3 A5 PF_9, PF_10 D6, A3
ADCHS_4 C6 P7_7, PB_6 B6, A6
ADCHS_5 B3 PF_11 A2
ADCHS_NEG B5 P7_7, PF_8 B6, E6
Fig 44. ADCHS input range
Vin_pos
0
-2048
+2047
ADC out
input range
Vin_neg - 400 mV
Vin_neg
Vin_neg + 400 mV
aaa-009653