Datasheet

LPC4370 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 21 October 2013 31 of 150
NXP Semiconductors
LPC4370
32-bit ARM Cortex-M4/M0 microcontroller
P8_6 K3 -
[3]
I; PU I/O GPIO4[6] — General purpose digital input/output pin.
I USB1_ULPI_NXT — ULPI link NXT signal. Data flow control signal from the
PHY.
- R — Function reserved.
O LCD_VD5 — LCD data.
O LCD_LP — Line synchronization pulse (STN). Horizontal synchronization
pulse (TFT).
- R — Function reserved.
- R — Function reserved.
I T0_CAP2 — Capture input 2 of timer 0.
P8_7 K1 -
[3]
I; PU I/O GPIO4[7] — General purpose digital input/output pin.
O USB1_ULPI_STP — ULPI link STP signal. Asserted to end or interrupt
transfers to the PHY.
- R — Function reserved.
O LCD_VD4 — LCD data.
O LCD_PWR — LCD panel power enable.
- R — Function reserved.
- R — Function reserved.
I T0_CAP3 — Capture input 3 of timer 0.
P8_8 L1 -
[3]
I; PU - R — Function reserved.
I USB1_ULPI_CLK — ULPI link CLK signal. 60 MHz clock generated by the
PHY.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
O CGU_OUT0 — CGU spare clock output 0.
O I2S1_TX_MCLK — I2S1 transmit master clock.
P9_0 T1 -
[3]
I; PU I/O GPIO4[12] — General purpose digital input/output pin.
O MCABORT
— Motor control PWM, LOW-active fast abort.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
I ENET_CRS — Ethernet Carrier Sense (MII interface).
I/O SGPIO0 — General purpose digital input/output pin.
I/O SSP0_SSEL — Slave Select for SSP0.
Table 3. Pin description
…continued
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2.
Symbol
LBGA256 TFBGA100 Reset state [2] Type
Description