Datasheet

LPC4370 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 21 October 2013 63 of 150
NXP Semiconductors
LPC4370
32-bit ARM Cortex-M4/M0 microcontroller
Remark: Pin functions for SPIFI and SSP0 boot are different.
7.14 Memory mapping
The memory map shown in Figure 5 and Figure 6 is global to both the Cortex-M4 and the
Cortex-M0 processors and all SRAM is shared between both processors. Each processor
uses its own ARM private bus memory map for the NVIC and other system functions.