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ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller SO 20 32-Bit 30 MHz I/O number 18
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LPC81XM All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4.3 — 22 April 2014 15 of 76
NXP Semiconductors
LPC81xM
32-bit ARM Cortex-M0+ microcontroller
8.8 I/O configuration
The IOCON block controls the configuration of the I/O pins. Each digital or mixed
digital/analog pin with the PIO0_n designator (except the true open-drain pins PIO0_10
and PIO0_11) in Table 4
can be configured as follows:
• Enable or disable the weak internal pull-up and pull-down resistors.
• Select a pseudo open-drain mode. The input cannot be pulled up above V
DD
. This pin
is not 5 V tolerant when V
DD
= 0.
Fig 7. LPC81xM Memory map