Datasheet

LPC81XM All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4.3 — 22 April 2014 22 of 76
NXP Semiconductors
LPC81xM
32-bit ARM Cortex-M0+ microcontroller
Optional warning interrupt can be generated at a programmable time prior to
watchdog time-out.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Incorrect feed sequence causes reset or interrupt if enabled.
Flag to indicate watchdog reset.
Programmable 24-bit timer with internal prescaler.
Selectable time period from (T
cy(WDCLK)
256 4) to (T
cy(WDCLK)
2
24
4) in
multiples of T
cy(WDCLK)
4.
The Watchdog Clock (WDCLK)is generated by a the dedicated watchdog oscillator
(WDOSC).
8.18 Self Wake-up Timer (WKT)
The self wake-up timer is a 32-bit, loadable down-counter. Writing any non-zero value to
this timer automatically enables the counter and launches a count-down sequence. When
the counter is used as a wake-up timer, this write can occur just prior to entering a
reduced power mode.
8.18.1 Features
32-bit loadable down-counter. Counter starts automatically when a count value is
loaded. Time-out generates an interrupt/wake up request.
The WKT resides in a separate, always-on power domain.
The WKT supports two clock sources: the low-power oscillator and the IRC. The
low-power oscillator is located in the always-on power domain, so it can be used as
the clock source in Deep power-down mode.
The WKT can be used for waking up the part from any reduced power mode,
including Deep power-down mode, or for general-purpose timing.
8.19 Analog comparator (ACMP)
The analog comparator with selectable hysteresis can compare voltage levels on external
pins and internal voltages.
After power-up and after switching the input channels of the comparator, the output of the
voltage ladder must be allowed to settle to its stable value before it can be used as a
comparator reference input. Settling times are given in Table 22
.
The analog comparator output is a movable function and is assigned to a pin through the
switch matrix. The comparator inputs and the voltage reference are enabled or disabled
on pins PIO0_0 and PIO0_1 through the switch matrix.