Datasheet
LPC81XM All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4.3 — 22 April 2014 71 of 76
NXP Semiconductors
LPC81xM
32-bit ARM Cortex-M0+ microcontroller
19. Revision history
Table 28. Revision history
Document ID Release date Data sheet status Change notice Supersedes
LPC81XM v.4.3 20140422 Product data sheet - LPC81XM v.4.2
Modifications:
• Section 8.20.2 “Clock input” updated for clarity.
• CLKIN signal removed from Table 12 “Dynamic characteristic: external clock (XTALIN
inputs)”.
• Name “SCT” changed to “SCTimer/PWM” for clarity.
• Remove slew rate control from GPIO features for clarity.
• MRT bus stall mode added.
• WWDT clock source corrected in Section 8.17.1.
• Pin description table updated for clarification (I2C-bus pins, WAKEUP, RESET).
• Added reflow solder diagram and thermal resistance numbers for XSON16
(SOT1341-1).
• Table 21: Added V
ref(cmp)
spec for PIO0_6/VDDCMP.
LPC81XM v.4.2 20131210 Product data sheet - LPC81XM v.4.1
Modifications: Corrected vertical axis marker in Figure 21 “
CoreMark score”.
LPC81XM v.4.1 20131112 Product data sheet - LPC81XM v.4
Modifications:
• Corrected XSON16 pin information in Figure 6 and Table 4.
LPC81XM v.4 20131025 Product data sheet - LPC81XM v.3.1
Modifications: • Added Section 14.1 “Typical wake-up times”.
• Added LPC812M101JTB16 and XSON16 package.
LPC81XM v.3.1 20130916 Product data sheet - LPC81XM v.3
Modifications:
• Correct the pin interrupt features: Pin interrupts can wake up the part from Sleep
mode, Deep-sleep mode, and Power-down mode. See Section 8.11.1.
• Table 9 “Static characteristics”: Updated power numbers for Deep-sleep, Power-down,
and Deep power-down.
• Added 30 MHz data to Figure 13 “Active mode: Typical supply current IDD versus
supply voltage VDD”, Figure 14 “Active mode: Typical supply current IDD versus
temperature”, and Figure 15 “Sleep mode: Typical supply current IDD versus
temperature for different system clock frequencies”.
LPC81XM v.3 20130729 Product data sheet - LPC81XM v.2.1
• Operating temperature range changed to 40 °C to 105 °C.
• Type numbers updated to reflect the new operating temperature range. See Table 1
“Ordering information” and Table 2 “Ordering options”.
• ISP entry pin moved from PIO0_1 to PIO0_12 for TSSOP, and SSOP packages. See
Table 4 and Table 6.
• Propagation delay values updated in Table 21 “Comparator characteristics”.
• SPI characteristics updated. See Section 12.6.
• IRC characteristics updated. See Section 12.3.
• CoreMark data updated. See Figure 19 and Figure 20.
• IRC frequency changed to 12 MHz +/- 1.5 %. See Table 13.
• Data sheet status updated to Product data sheet.
LPC81XM v.2.1 20130325 Preliminary data sheet - LPC81XM v.2