Datasheet
LPC81XM All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4.3 — 22 April 2014 36 of 76
NXP Semiconductors
LPC81xM
32-bit ARM Cortex-M0+ microcontroller
[1] Typical ratings are not guaranteed. The values listed are for room temperature (25 C), nominal supply voltages.
[2] I
DD
measurements were performed with all pins configured as GPIO outputs driven LOW and pull-up resistors disabled.
[3] IRC enabled; system oscillator disabled; system PLL disabled.
[4] BOD disabled.
[5] All peripherals disabled in the SYSAHBCLKCTRL register. Peripheral clocks to USART, CLKOUT, and IOCON disabled in system
configuration block.
[6] Low-current mode PWR_LOW_CURRENT selected when running the set_power routine in the power profiles.
[7] IRC enabled; system oscillator disabled; system PLL enabled.
[8] IRC disabled; system oscillator enabled; system PLL enabled.
[9] All oscillators and analog blocks turned off in the PDSLEEPCFG register; PDSLEEPCFG = 0x0000 18FF.
[10] WAKEUP pin pulled HIGH externally.
[11] Including voltage on outputs in tri-state mode.
[12] 3-state outputs go into tri-state mode in Deep power-down mode.
[13] Allowed as long as the current limit does not exceed the maximum current allowed by the device.
[14] Pull-up and pull-down currents are measured across the weak internal pull-up/pull-down resistors. See Figure 8
.
[15] To V
SS
.
Oscillator input pins (PIO0_8 and PIO0_9)
V
i(xtal)
crystal input voltage 0.5 1.8 1.95 V
V
o(xtal)
crystal output voltage 0.5 1.8 1.95 V
Table 9. Static characteristics
…continued
T
amb
=
40
C to +105
C, unless otherwise specified.
Symbol Parameter Conditions Min Typ
[1]
Max Unit
Fig 13. Pin input/output current measurement
/3&
DDD
SLQ3,2BQ
,
2+
,SX
SLQ3,2BQ
,
2/
,
SG
9
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