Datasheet

DRAFT DRAFT DRAFT DR DRAFT DRAFT DRAFT
D
RAF
DRAFT DRAFT DRA
F
T D
RAFT DR
AFT D
DRA
F
T DRAFT DRAFT
D
RAFT
DRAFT
D
RAFT
DRA
LPC82x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 0.11 — 26 August 2014 39 of 81
NXP Semiconductors
LPC82x
32-bit ARM Cortex-M0+ microcontroller
11.4 Power consumption
Power measurements in Active, Sleep, Deep-sleep, and Power-down modes were
performed under the following conditions:
• Configure all pins as GPIO with pull-up resistor disabled in the IOCON block.
• Configure GPIO pins as outputs using the GPIO DIR register.
• Write 1 to the GPIO CLR register to drive the outputs LOW.
Conditions: T
amb
= 25 C; active mode entered executing code while(1){} from flash; all
peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL =0x1F); all peripheral
clocks disabled; internal pull-up resistors disabled; BOD disabled; low-current mode.
1 MHz - 6 MHz: external clock; IRC, PLL disabled.
12 MHz: IRC enabled; PLL disabled.
24 MHz: IRC enabled; PLL enabled.
30 MHz: system oscillator enabled; PLL enabled.
Fig 13. Active mode: Typical supply current I
DD
versus supply voltage V
DD
aaa-013992
1.8 2.4 3 3.6
0
1
2
3
4
V
DD
(V)
I
DD
DD
I
DD
(mA)
(mA)
(mA)
30 MHz
30 MHz
30 MHz
24 MHz
24 MHz
24 MHz
12 MHz
12 MHz
12 MHz
6 MHz
6 MHz
6 MHz
4 MHz
4 MHz
4 MHz
3 MHz
3 MHz
3 MHz
2 MHz
2 MHz
2 MHz
1 MHz
1 MHz
1 MHz