Datasheet
DRAFT
DRAFT DRAFT DR
DRAFT DRAFT DRAFT
D
RAF
DRAFT DRAFT DRA
F
T D
RAFT DR
AFT D
DRA
F
T DRAFT DRAFT
D
RAFT
DRAFT
D
RAFT
DRA
LPC82x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 0.11 — 26 August 2014 59 of 81
NXP Semiconductors
LPC82x
32-bit ARM Cortex-M0+ microcontroller
12.3.6 USART interface
The maximum USART bit rate is 10 Mbit/s in synchronous mode master mode and
10 Mbit/s in synchronous slave mode.
Remark: USART functions can be assigned to all digital pins. The characteristics are valid
for all digital pins except the open-drain pins PIO0_10 and PIO0_11.
Table 20. USART dynamic characteristics
T
amb
=
40
C to 105
C; 1.8 V <= V
DD
<= 3.6 V unless noted otherwise; C
L
= 10 pF; input slew =
10 ns. Simulated parameters sampled at the 30 %/70 % level of the falling or rising edge; values
guaranteed by design.
Symbol Parameter Conditions Min Max Unit
USART master (in synchronous mode)
t
su(D)
data input set-up time 3.0 V <= V
DD
<= 3.6 V 31 - ns
1.8 V <= V
DD
< 3.0 V 37
t
h(D)
data input hold time 0 - ns
t
v(Q)
data output valid time 0 5 ns
USART slave (in synchronous mode)
t
su(D)
data input set-up time 6 - ns
t
h(D)
data input hold time 2 - ns
t
v(Q)
data output valid time 3.0 V <= V
DD
<= 3.6 V 0 28 ns
1.8 V <= V
DD
< 3.0 V 0 37 ns
In master mode, T
cy(clk)
= U_PCLK/BRGVAL. See the LPC82x User manual.
Fig 36. USART timing
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5;'
7
F\FON
W
VX'
W
K'
W
Y4
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W
Y4
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67$57
%,7
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