Datasheet

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THROTTLE CONTROL H-BRIDGE

33932

ORDERING INFORMATION

Device

(Add R2 Suffix for

Tape and Reel)

Temperature

Range (T

)

Package

MC33932VW

-40 to 125 °C

44 HSOP

MC33932EK 54 SOICW-EP

VW SUFFIX (PB-FREE)

98ARH98330A

44-PIN HSOP

WITH PROTRUDING

HEAT SINK

EK SUFFIX (PB-FREE)

98ASA99334D

54-PIN SOICW-EP

Document Number: MC33932

Rev. 5.0, 10/2012

Freescale Semiconductor

Technical Data

5.0 A Throttle Control H-Bridge

The 33932 is a monolithic H-Bridge Power IC in a robust thermally

enhanced package. The 33932 has two independent monolithic 

H-Bridge Power ICs in the same package. They are designed primarily

for automotive el

ectronic throttle control, but are applicable to any low

voltage DC servo motor control application within the current and

voltage limits stated in this specification.

Each H-Bridge in the 33932 is able to control inductive loads with

currents up to

5.0 A peak. RMS current capability is subject to the

gree of heatsinking provided to the device package. Internal peak-

current limiting (regulation) is activated at load currents above 6.5 A

±1.5 A. Output loads can be pulse-w

idth modulated (PWM-ed) at

frequencies up to 11 kHz. A load current feedback feature provides a

prop

ortional (0.24% of the load current) current output suitable for

monitoring by a microcontroller’s A/D input. A Status Flag output

reports under-voltage, over-current, and over-temperature fault

conditions.

Two independent inputs provide polarity control of two half-bridge

totem

pole outputs. Two independent disable inputs are provided to

force the H-Bridge outputs to tri-state (high-impedance off state).

Features

•8.0 to 28 V continuous operation (transient o

peration from 5.0 to

40 V)

•235 m maximum R

DS(ON)

at 150 °C (each H-Bridge MOSFET)

• 3.0 and 5.0 V TTL / CMOS logic compatible inputs

• Output short-circuit protection (short to VPWR or GND)

• Over-current limiting (regulation) via internal constant-off-time

PWM

• Temperature dependant current limit threshold reduction

• All inputs have an internal source/sink to define the default

(fl

oating input) states

• Sleep mode with current draw < 50 µA (each half with inputs

floatin

g or set to match default logic states)

SFA

FBA

IN1

IN2

EN/D2

VPWRA

CCPA

OUT1

OUT2

PGNDA

AGNDA

MCU

33932

PWR

MOTOR

OUT3

OUT4

MOTOR

SFB

IN4

IN3

FBB

EN/D4

PGNDB

AGNDB

VPWRB

CCPB

PWR

Figure 1. MC33932 Simplified Application Diagram

Summary of content (28 pages)

PAGE 1
Freescale Semiconductor Technical Data Document Number: MC33932 Rev. 5.0, 10/2012 5.0 A Throttle Control H-Bridge 33932 The 33932 is a monolithic H-Bridge Power IC in a robust thermally enhanced package. The 33932 has two independent monolithic  H-Bridge Power ICs in the same package. They are designed primarily for automotive electronic throttle control, but are applicable to any low voltage DC servo motor control application within the current and voltage limits stated in this specification.
PAGE 2
INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM VPWRA LOGIC SUPPLY CCPA VDD VCP CHARGE PUMP HS1 HS2 OUT1 TO GATES OUT2 HS1 IN1 LS1 IN2 HS2 EN/D2 D1 GATE DRIVE AND PROTECTION LOGIC LS1 PGND LS2 VSENSE SFA LS2 CURRENT MIRROR AND CONSTANT OFF-TIME PWM CURRENT REGULATOR ILIM PWM FBA H-Bridge A AGNDA PGNDA H-Bridge B LOGIC SUPPLY CCPB VDD VPWRB VCP CHARGE PUMP HS1 HS2 OUT3 TO GATES OUT4 HS1 IN3 LS1 IN4 HS2 EN/D4 D3 GATE DRIVE AND PROTECTION LOGIC SFB LS1 PGND LS2 VSENSE
PAGE 3
PIN CONNECTIONS PIN CONNECTIONS AGNDA Tab D1 FBA EN/D2 VPWRA VPWRA VPWRA OUT1 OUT1 OUT1 PGNDA PGNDA PGNDB PGNDB OUT4 OUT4 OUT4 VPWRB VPWRB CCPB IN4 IN3 SFB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 H-BRIDGE A H-BRIDGE B SFA IN1 IN2 CCPA VPWRA VPWRA OUT2 OUT2 OUT2 PGNDA PGNDA PGNDB PGNDB OUT3 OUT3 OUT3 VPWRB VPWRB VPWRB EN/D4 FBB D3 Tab VPWRA NC D1 FBA EN/D2 NC NC NC VPWRA OUT1 OUT1 PGNDA PGNDA NC PGNDB PGNDB OUT4 OUT4
PAGE 4
PIN CONNECTIONS Table 1. 33932 Pin Definitions (continued) Pin HSOP (VW) Pin SOICW-EP (EK) 10, 11, 34, 35 12, 13, 42, 43 PGNDA 12, 13, 32, 33 15, 16, 39, 40 14-16 Pin Name Pin Function Formal Name Definition Power Ground Power Ground High-current power ground pins must be connected together physically as close as possible and directly soldered down to a wide, thick, low resistance ground plane on the PCB. PGNDA should be connected to PGNDB with a low-impedance path.
PAGE 5
PIN CONNECTIONS Table 1. 33932 Pin Definitions (continued) Pin HSOP (VW) Pin SOICW-EP (EK) Pin Name 44 52 SFA TAB 54 27 – – Pin Function Formal Name Definition Logic Output Open Drain Status Flag (Active Low) H-Bridge A open drain active LOW Status Flag output (requires an external pull-up resistor to VDD. Maximum permissible load current < 0.5 mA. Maximum VSFLOW< 0.4 V at 0.3 mA. Maximum permissible pull-up voltage < 7.0 V.
PAGE 6
ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Table 2. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. These parameters are not production tested. Ratings Symbol Value Unit VPWR(SS) VPWR(T) - 0.3 to 28 Logic Input Voltage(2) VIN - 0.3 to 7.0 V SFA, SFB Output(3) V SF - 0.3 to 7.0 V IOUT(CONT) 5.
PAGE 7
ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics Characteristics noted under conditions 5.0 V VPWR  28 V, - 40 C  TA  125C, GND = 0 V, unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25 °C under nominal conditions, unless otherwise noted. Specifications given for H-Bridge A apply symmetrically to H-Bridge B.
PAGE 8
ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 5.0 V VPWR  28 V, - 40 C  TA  125C, GND = 0 V, unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25 °C under nominal conditions, unless otherwise noted. Specifications given for H-Bridge A apply symmetrically to H-Bridge B. Characteristic Symbol Min Typ Max Unit – 120 – VPWR = 8.
PAGE 9
ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 4. Dynamic Electrical Characteristics Characteristics noted under conditions 5.0 V  VPWR  28 V, - 40C  TA  125C, GND = 0 V, unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.
PAGE 10
ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS VIN1, IN2 (V) 5.0 VOUT1, 2 (V) TIMING DIAGRAMS VPWR 1.5 V 1.5 V 0 t DON t DOFF 80% 20% 0 TIME 5.0 V 1.5 V 0V IO = 100 mA VOUT1, 2 VD1, EN/D2 (V) Figure 4. Output Delay Time tDDISABLE 90% V TIME Figure 5. Disable Delay Time VOUT1, 2 (V) . tF VPWR tR 90% 90% 10% 0 10% TIME Figure 6. Output Switching Time Overload Condition IOUT, CURRENT (A) 9.0 ISC Short-circuit Detection Threshold tB 6.5 0.0 5.
PAGE 11
ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS Short-circuit Condition t FAULT IOUT, CURRENT (A) 9.0 ISC Short-circuit Detection Threshold Hard Short Occurs tB 6.5 OUT1, OUT2 Tri-stated, SF set Low ILIM 0.0 5.0 t B (~16 s) TIME Figure 8. Short-circuit Detection Turn-OFF Time tFAULT . Current Limit Threshold Foldback. Operation within this region must be limited to non-repetitive events not to exceed 30 s per 24 hr. ILIM, CURRENT (A) 6.5 4.2 tSEP tLIM Thermal Shutdown tHYS tFB tLIM Figure 9.
PAGE 12
FUNCTIONAL DESCRIPTION INTRODUCTION FUNCTIONAL DESCRIPTION INTRODUCTION The 33932 has two identical H-Bridge drivers in the same package. The only connection that is shared internally is the Analog Ground (AGND). This description is given for the HBridge A half of the total device. However, the H-Bridge B half will exhibit identical behavior.
PAGE 13
FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION ENABLE INPUT/DISABLE INPUT 2 (EN/D2) The EN/D2 pin performs the same function as D1 pin, when it goes to a logic LOW the outputs are immediately tristated. It is also used to place the device in a Sleep mode so as to consume very low currents. When the EN/D2 pin voltage is a logic LOW state, the device is in the Sleep mode. The device is enabled and fully operational when the EN pin voltage is logic HIGH.
PAGE 14
FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES FUNCTIONAL DEVICE OPERATION SF LOGIC OUT EN/D2 LOGIC IN D1 LOGIC IN INn LOGIC IN ILOAD OUTPUT CURRENT (A) OPERATIONAL MODES 9.0 Typical Short-circuit Detection Threshold 6.
PAGE 15
FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS LOGIC COMMANDS Table 5. Truth Table The tri-state conditions and the status flag are reset using D1 or D2. The truth table uses the following notations: L = LOW, H = HIGH, X = HIGH or LOW, and Z = High-impedance. All output power transistors are switched off.
PAGE 16
FUNCTIONAL DEVICE OPERATION PROTECTION AND DIAGNOSTIC FEATURES PROTECTION AND DIAGNOSTIC FEATURES SHORT-CIRCUIT PROTECTION If an output short-circuit condition is detected, the power outputs tri-state (latch-OFF) independent of the input (IN1 and IN2) states, and the fault status output flag (SF) is SET to logic LOW.
PAGE 17
TYPICAL APPLICATIONS INTRODUCTION TYPICAL APPLICATIONS INTRODUCTION A typical application schematic is shown in Figure 14. For precision high-current applications in harsh, noisy environments, the VPWR by-pass capacitor may need to be substantially larger. VPWR 100 F 100 nF VPWRA 33 nF LOGIC SUPPLY CCPA VDD VCP CHARGE PUMP HS1 HS2 OUT1 M TO GATES OUT2 HS1 IN1 IN2 EN/D2 D1 +5.
PAGE 18
PACKAGING PACKAGE DIMENSIONS PACKAGING PACKAGE DIMENSIONS For the most current package revision, visit www.freescale.com and perform a keyword search using the 98Axxxxxxxxx listed below. Dimensions shown are provided for reference ONLY.
PAGE 19
PACKAGING PACKAGE DIMENSIONS VW SUFFIX 44-PIN 98ARH98330A REVISION B 33932 Analog Integrated Circuit Device Data Freescale Semiconductor 19
PAGE 20
PACKAGING PACKAGE DIMENSIONS EK SUFFIX 54-PIN 98ASA99334D REVISION C 33932 20 Analog Integrated Circuit Device Data Freescale Semiconductor
PAGE 21
PACKAGING PACKAGE DIMENSIONS EK SUFFIX 54-PIN 98ASA99334D REVISION C 33932 Analog Integrated Circuit Device Data Freescale Semiconductor 21
PAGE 22
PACKAGING PACKAGE DIMENSIONS EK SUFFIX 54-PIN 98ASA99334D REVISION C 33932 22 Analog Integrated Circuit Device Data Freescale Semiconductor
PAGE 23
ADDITIONAL DOCUMENTATION PACKAGE DIMENSIONS ADDITIONAL DOCUMENTATION THERMAL ADDENDUM Introduction This thermal addendum is provided as a supplement to the MC33932 technical datasheet. The addendum provides thermal performance information that may be critical in the design and development of system applications. All electrical, application, and packaging information is provided in the datasheet.
PAGE 24
THERMAL ADDENDUM PACKAGE DIMENSIONS Figure 15.
PAGE 25
REFERENCE SECTION PACKAGE DIMENSIONS REFERENCE SECTION Table 7.
PAGE 26
REVISION HISTORY REVISION HISTORY REVISION DATE 1.0 8/2007 • Initial Release 2.0 8/2008 • Added parameters (TBD) for Change Pump Voltages in Table 3 3.0 11/2008 4.0 5.
PAGE 27
REVISION HISTORY 33932 Analog Integrated Circuit Device Data Freescale Semiconductor 27
PAGE 28
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