Freescale Semiconductor Technical Data Document Number: MC34704 Rev. 7.0, 12/2011 Multiple Channel DC-DC Power Management IC 34704 The 34704 is a multi-channel Power Management IC (PMIC) used to address power management needs for various multimedia application microprocessors. Its ability to provide either 5 or 8 independent output voltages with a single input power supply (2.7 and 5.
DEVICE VARIATIONS DEVICE VARIATIONS Table 1. Device Variations Orderable Part Number No.
INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM REG8 voltage data voltage data REG1/VG Control Control VOUT1 (34704A) OUT8 PWM P-skip PWM Error Amp FB8 voltage data OUT7 Control voltage data Control Error Amp BT2D PVIN2 SW2D VOUT2 PWM Error Amp FB7 PWM P-skip Amp SW2U VG Boot VREF7 COMP7 PreDrv PreDrv DRV7 BT1 VG REG2 REG7 (34704A) VG Boot Boot Start-Up Ipeak-det and blanking SW control SW1 Boot VG BT8 VG Error Amp PreDrv PreDrv SW8 Error Amp PreDrv L voltage d
PIN CONNECTIONS COMP2 FB2 BT2D PVIN2 SW2D VOUT2 SW2U SW5U VOUT5 SW5D PVIN5 BT5D FB5 COMP5 COMP2 FB2 BT2D PVIN2 SW2D VOUT2 SW2U SW5U VOUT5 SW5D PVIN5 BT5D FB5 COMP5 PIN CONNECTIONS BT5U 56 55 54 53 52 51 50 49 48 47 46 45 44 43 1 42 BT2U BT5U 56 55 54 53 52 51 50 49 48 47 46 45 44 43 1 42 BT2U BT4D 2 41 ONOFF BT4D 2 41 ONOFF PVIN4 3 40 LION PVIN4 3 40 LION SW4D 4 39 VDDI SW4D 4 39 VDDI VOUT4 5 38 VIN VOUT4 5 38 VIN SW4U 6 37 AGND SW4U 6
PIN CONNECTIONS Table 2. 34704 Pin Definitions (continued) A functional description of each pin can be found in the Functional Pin Description section beginning on page 17. Pin Number Device Pin Name Pin Function Formal Name Definition 11 A/B PVIN3 Power REG3 power supply input voltage This is the connection to the drain of the high side switch FET. Input decoupling /filtering is required for proper REG3 operation. Use a 10uf decoupling capacitor for better performance.
PIN CONNECTIONS Table 2. 34704 Pin Definitions (continued) A functional description of each pin can be found in the Functional Pin Description section beginning on page 17.
PIN CONNECTIONS Table 2. 34704 Pin Definitions (continued) A functional description of each pin can be found in the Functional Pin Description section beginning on page 17. Pin Number Device Pin Name Pin Function 47 A/B SW2D Input/Output 48 A/B VOUT2 Output 49 A/B SW2U 50 A/B 51 Formal Name Definition REG2 Buck Stage switching node The inductor is connected between this pin and the SW2U pin.
ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Table 3. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Ratings Symbol Value Unit VIN -0.3 to 6.0 V ELECTRICAL RATINGS Battery Input Supply Voltage (VIN) Pin PVINx, RST, ONOFF, LION, DRV7(8), VG, SCL, SDA and VOUT1-5 Pins -0.3 to 6.0 VDDI, COMPx, FBx, VREF7(8), FREQ, and SS Pins -0.3 to 3.
ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 4. Static Electrical Characteristics Characteristics noted under conditions 2.7 V ≤ VIN ≤ 5.5 V, - 20°C ≤ TA ≤ 85°C, GND = 0 V, unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted. Characteristic Symbol Min Typ Max Input Supply Voltage Typical Range VIN 2.7 - 5.
ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 4. Static Electrical Characteristics (continued) Characteristics noted under conditions 2.7 V ≤ VIN ≤ 5.5 V, - 20°C ≤ TA ≤ 85°C, GND = 0 V, unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted. Characteristic Symbol Min Typ Max Unit VOUT 0.6 3.3 3.6 V - -2.0 - 2.0 % REGLN/LD -1.0 - 1.0 % VFB - 0.
ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 4. Static Electrical Characteristics (continued) Characteristics noted under conditions 2.7 V ≤ VIN ≤ 5.5 V, - 20°C ≤ TA ≤ 85°C, GND = 0 V, unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted. Characteristic Symbol Min Typ Max Unit VOUT 0.6 1.8 3.6 V - -2.0 - 2.0 % REGLN/LD -1.0 - 1.0 % VFB - 0.
ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 4. Static Electrical Characteristics (continued) Characteristics noted under conditions 2.7 V ≤ VIN ≤ 5.5 V, - 20°C ≤ TA ≤ 85°C, GND = 0 V, unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted. Characteristic Symbol Min Typ Max Unit PVIN5 Leakage Current (Off State) @25°C IPVIN5_LKG - - 1.
ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 4. Static Electrical Characteristics (continued) Characteristics noted under conditions 2.7 V ≤ VIN ≤ 5.5 V, - 20°C ≤ TA ≤ 85°C, GND = 0 V, unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted. Characteristic Symbol Min Typ Max Unit VOUT 5.0(19) 15 15 V - -4.0 - 4.0 % Feedback Reference Voltage VFB - 0.
ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 5. Dynamic Electrical Characteristics Characteristics noted under conditions 2.7V ≤ VIN ≤ 5.5V, -20°C ≤ TA ≤ 85°C, GND = 0V, unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.
ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 5. Dynamic Electrical Characteristics Characteristics noted under conditions 2.7V ≤ VIN ≤ 5.5V, -20°C ≤ TA ≤ 85°C, GND = 0V, unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.
FUNCTIONAL DESCRIPTION INTRODUCTION FUNCTIONAL DESCRIPTION INTRODUCTION The 34704 is an multi-channel power management IC (PMIC) meant to address power management needs for various multimedia applications microprocessors in various configurations with a target overall efficiency of > 80% at typical loads. The 34704 accepts an input voltage from various sources: •1 cell Li-Ion/Polymer (2.7 to 4.2 V) •5.
FUNCTIONAL DESCRIPTION FUNCTIONAL PIN DESCRIPTION FUNCTIONAL PIN DESCRIPTION REG5 BOOST STAGE BOOTSTRAP CAPACITOR INPUT PIN (BT5U) Connect a 1.0 μF capacitor between this pin and SW5U pin to enhance the gate of the Switch Power MOSFET. REG3 SWITCHING NODE (SW3) The inductor is connected between this pin and the regulated REG3 output. REG3 OUTPUT VOLTAGE RETURN PIN (VOUT3) REG4 BUCK STAGE BOOTSTRAP CAPACITOR INPUT PIN (BT4D) Connect a 0.
FUNCTIONAL DESCRIPTION FUNCTIONAL PIN DESCRIPTION REG1 REGULATED OUTPUT VOLTAGE PIN (VOUT1) (34704A ONLY) Connect this pin directly to the load directly and to the output filter as close to the pin as possible. REG6 SWITCHING NODE (SW6) (34704A ONLY) The inductor is connected between this pin and the VIN pin. REG1 BOOTSTRAP CAPACITOR INPUT PIN (BT1) REG6 REGULATED OUTPUT VOLTAGE PIN (VOUT6) (34704A ONLY) Connect a 1.
FUNCTIONAL DESCRIPTION FUNCTIONAL PIN DESCRIPTION REG2 BUCK STAGE SWITCHING NODE (SW2D) REG5 POWER SUPPLY INPUT VOLTAGE (PVIN5) The inductor is connected between this pin and the SW2U pin. This is the connection to the drain of the high side switch FET. Input decoupling /filtering is required for proper REG5 operation. REG2 REGULATED OUTPUT VOLTAGE PIN (VOUT2) Connect this pin to the load and to the output filter as close to the pin as possible.
FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION * Figure 4. MC34704 Functional Internal Block Diagram INTERNAL BIAS CIRCUIT Gate Driver Voltage (VG) REG1/VG is the main regulator of the 34704 IC and will be used to supply internal circuitry and voltage biases through the VG output. It also provides the gate drive voltage for the rest of the regulators and itself.
FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION operation, or shuts down after a failure to regain normal operation. • A hard over-current limit (short-circuit limit) that is higher than the cycle by cycle limit at which the device reacts by shutting down the output immediately. This is necessary to prevent damage in case of a short-circuit.
FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION REGUALATOR OVERVIEW WITH EFFICIENCY ANALYSIS REG1 (34704A Only) REG1 is a synchronous boost PWM voltage-mode control DC/DC regulator available only in the 34704A. Even though REG1 is a synchronous regulator, it is recommended to have a diode connected externally across its synchronous MOSFET. When the battery voltage is above REG1’s output (>5.
FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION See Power-Up Sequence on page 28 for more details on when REG3 is powered up in the sequence. The switcher will operate in DCM at very light loads to allow pulse skipping. VOUT3 will be discharged every time the regulator is shutting down and it will be held low by the discharge FET as long as possible.
FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION • The output is monitored for over-current and short-circuit conditions • The regulator is monitored for over-temperature conditions Operation Modes The switcher will be active when: • VG is in regulation AND • There is no GrpC (OR GrpE) shutdown command through the I2C interface AND • No faults exist that would cause GrpC (OR GrpE) to shut down REG7 (Only 34704A) This is a none-synchronous buck-boost inverting PWM voltage-mode control DC/DC reg
FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION • Operates at a switching frequency equals to FSW2 • Drives integrated low RDS(ON) N-channel power MOSFETs (NVHV_LC) as its output stage • It offers load disconnect from the input battery when the output is off (True Cut-Off) • The output is ±4% accuracy • Output voltage is adjustable by means of an external resistor divider when in voltage regulation mode • A 240 mV current limit comparator will be used to program/ sense the voltage drop across
FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION Table 6. Regulator Analysis Table REG1 REG2 REG3 REG4 REG5 REG6 REG7 REG8 Vin (V) 3.60 3.60 3.60 3.60 3.60 3.60 3.60 3.60 Vout (V) 5.00 3.30 1.20 1.80 3.30 15 -7 15 Iout_typ (A) 0.100 0.200 0.150 0.100 0.150 0.050 0.050 0.015 Iout_max (A) 0.500 0.500 0.550 0.300 0.500 0.060 0.060 0.030 DCR(mΩ) 230 230 230 310 230 230 230 230 Cout (μF) 22 22 22 22 22 22 22 22 ESR (mΩ) 9.00 9.00 9.
FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION MC34704 EFFICIENCY WAVEFORMS REG5 Efficiency 100% REG1 Efficiency 90% 100% 80% 90% 70% 80% 60% 70% 50% 60% 40% 50% 30% 40% 20% 30% 10% 20% 0% 10% 0 100 200 300 0% 0 100 200 300 IOUT 400 500 IOUT 400 500 600 600 REG6 Efficiency 100% 90% REG2 Efficiency 100% 80% 90% 70% 80% 60% 70% 50% 60% 40% 50% 30% 40% 20% 30% 10% 20% 0% 10% 0 10 20 30 0% 0 100 200 IOUT 300 400 500 IOUT 40 50
FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES POWER-UP SEQUENCE Following is the power up sequence from a battery connection or a Power On signal through the ONOFF pin. 1. Battery initially connected to VIN. 2. LION pin is used to determine if a battery is being used (High for Li-Ion battery). 3. At initial power up from a cold start like the above with the battery first connected, the status of the ONOFF pin is ignored and 34704 moves forward to step (5). 4.
FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES • In any of the previous shutdown sequences, VG output will stay alive to maintain internal circuitry and logic until all other regulators are off, then it will shut off. POWER SUPPLY The battery voltage range is the following depending on the application: • 1-cell Li-Ion/Polymer: 2.7 to 4.2 V. Typ value is 3.6 V • USB supply or AC wall adapter: 4.5 to 5.5 V. Typ value is 5.0 V. This gives a total input voltage supply range of 2.7 to 5.
FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES • Do nothing until the second time period expires and let the device power off by itself The ONOFF pin is edge sensitive and activates on a falling edge. It is normally pulled high.
FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS processor decision to either shutoff or not, in the mean time the control loop will try to fix itself. To avoid erroneous conditions, a 20 μs filter will be implemented. The OV/UV fault flag is masked during DVS until DVSSTAT flag is asserted “Done”. To keep the RST output low during ramp up and until the soft start is done, the OV/UV protection is masked from reporting that the output is in regulation.
FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS OPTION MSB LSB 2 0 1 GRPC/E ENABLED GRPC/E DISABLED REG5 ramps up first REG5, REG6 and REG7 ramp down together Then REG6 and REG7 ramp up together 3 1 0 REG5, REG6, and REG7 ramp up together REG5, REG6, and REG7 ramp down together 4 1 1 REG5 and REG6 ramp up together first. REG7 ramps down first.
FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS Percentage Change MSB LSB 0.00% (Default) 0 0 0 0 +2.50% 0 0 0 1 +5.00% 0 0 1 0 +7.50% 0 0 1 1 +10.00% 0 1 0 0 +12.50% 0 1 0 1 +15.00% 0 1 1 0 +17.50% 0 1 1 1 -20.00% 1 0 0 0 -17.50% 1 0 0 1 -15.00% 1 0 1 0 -12.50% 1 0 1 1 -10.00% 1 1 0 0 -7.50% 1 1 0 1 -5.00% 1 1 1 0 -2.
FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS Dynamic Voltage Scaling Status Flag LSB In addition and for each regulator, 34704 assigns 1 bit (DVSSTATx) to flag to the processor that the desired output voltage level set with the DVSSETx bits has been reached.
FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS The 34704 assigns 1 bit for each regulator (TSDFx) to indicate a fault due to thermal limit, where x corresponds to each regulator from REG1 to REG8, except REG7 TSDF bit False 0 True 1 REG7 Independent ON/OFF Control (Only on 34704A) The 34704B provide two register to independently turn on REG7 when REG6 is not needed. Care must be taken when turning on REG7 to avoid inrush currents during regulator ramp-up.
FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS Register ADDR REG2SET2 $07 REG3SET1 $08 REG3SET2 $09 REG4SET1 $0A REG4SET2 $0B REG5SET1 $0C REG5SET2 $0D REG5SET3 $0E REG6SET1 $0F REG6SET2 $10 REG6SET3 $11 REG7SET1 $12 REG7SET2 $13 REG7SET3 $14 REG8SET1 $15 REG8SET2 $16 R/W Bit Name Bits R DVSSTAT2 0 R - 5:1 R/W OVUVSET3 0 R/W DVSSET3 4:1 R DVSSTAT3 0 R - 5:1 R/W OVUVSET4 0 R/W DVSSET4 4:1 R DVSSTAT4 0 R - 5:1 R/W OVUVSET5 0 R/W
FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS I2C REGISTER DISTRIBUTION There are also the IC general use registers. Those registers are also split between status reporting registers and processor programmable registers. This distribution keeps each regulator’s registers bundled together which makes it easier for the user to access one regulator at a time. Each regulator has a fault register that records any fault that occurs in that regulator.
FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS Addr Name $00 Reserved $01 GENERAL1 D7 D6 GENERAL2 $03 GENERAL3 - $04 Reserved $06 REG2SET1 $07 REG2SET2 $08 REG3SET1 $09 REG3SET2 $0A REG4SET1 $0B REG4SET2 $0C REG5SET1 $0D REG5SET2 $0E $0F$12 REG5SET3 $13 FSW2SET $14 Reserved $15 REG8SET1 D3 - $02 VGSET2 D4 REG8SET2 $17 REG8SET3 - - SHTD COLDF - - - - - TSDF2 - SCF2 OVF1 OVUVSET2 UVF2 OVF2 DVSSTAT2 SCF3 ILIMF3 OVUVSET3 UVF3 OVF3 DV
FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION COMPONENT CALCULATION FSW1 AND GENERAL SOFT START CONFIGURATION The 34704 uses FSW1 as the switching frequency for REG1(VG) thru REG5, and this can be changed by applying a voltage between 0 to 2.5 V to the FREQ pin. If the FREQ pin is left unconnected, the 34704 starts up with a default frequency of 750 KHz.
FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION 1. Define IOB as the minimum current to maintain CCM as 15% of full load. 2 Vo ( D ) ( 1 – D ) T L min ≥ -----------------------------------------2I OB (H) where: D = Dutycycle Vo = Output Voltage T = Switching Period IOB = Boundary Current to achieve CCM regulators may work as a buck or a boost depending on the operating voltages, they need to be compensated in different ways for each situation.
FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION 1. First calculate the dt_I (inductor current rising time) given by: Io max T dtI = -------------------ΔIostep [s] Where the parameter ΔIo_step is the maximum current step during the current rising time and is define as: [A] D max Vin min – Vo ΔIostep = ⎛⎝ -------------⎞⎠ ⎛⎝ -------------------------------⎞⎠ L Fsw • R1 and RB: These two resistors help to set the output voltage to the desire value using a Vref=0.
FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION F PO = F BW F Z1 = 0.9F LC F P1 = F ESR F Z2 = 1.1F LC F SW F P2 = ---------2 The passive components associated to these frequencies are calculated with the following formulas.
FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION Compensating for boost operation: • L: A boost power stage can be designed to operate in CCM for load currents above a certain level usually 5 to 15% of full load. The minimum value of inductor to maintain CCM can be determined by using the following procedure: 1. Define IOB as the minimum current to maintain CCM between 10 to 15% of full load: R1 RB = ----------------------Vo ------------- – 1 V REF [Ω] • Compensation network.
FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION The passive components associated to these frequencies are calculated with the following formulas Vin min ⎛ 1 ⎞ 1 C1 = ------------------ ⎜ ----------------2⎟ ⎛⎝ -----------------------------⎞⎠ V RAMP ⎝ D′ ( 2π F ⎠ PO R1 ) min 1 C2 = ⎛⎝ ----------------------------⎞⎠ 2π ( F Z2 R1 ) 1 R2 = ⎛ ----------------------------⎞ ⎝ 2π ( F Z1 C1 )⎠ 1 R3 = ⎛ ----------------------------⎞ ⎝ 2π ( F P1 C2 )⎠ 1 C3 = ⎛ ----------------------------⎞ ⎝ 2π ( F P2 R2 )⎠ On th
FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION feedback using the standard voltage divider configuration, or can be programmed to work with a current feedback configuration to control the current flowing through a LED string. It does not need external compensation network, thus the only components that need to be calculated are: • L: A boost power stage can be designed to operate in CCM for load currents above a certain level usually 5 to 15% of full load.
FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION • Output LC filter cutoff frequency (FLC): V RRM ≥ Vin – Vo • L: The minimum value of inductor to maintain CCM can be determined by using the following procedure: 2 Vin min – VoT L min ≥ ----------------- ⎛ -------------------------------⎞ ⎝ ⎠ 2Io max Vo – Vin min [Hz] Where D’min is the minimum off time percentage given by: [H] • COUT: The three elements of output capacitor that contribute to its impedance and output voltage ripple are the ESR, the E
FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION The passive components associated to these frequencies are calculated with the following formulas.
TYPICAL APPLICATIONS TYPICAL APPLICATIONS VIN VIN 34704A (19) VOUT1 REG8 V8 VG SW8 BT8 V1 VG REG8 SW1 BT1 BT2D FB8 VIN PVIN2 VIN SW2D VOUT7 VOUT2 V2 DRV7 V7 REG2 SW2U REG7 BT2U FB7 FB2 COMP2 VREF7 BT3 COMP7 VIN VOUT6 V6 VIN PVIN3 SW3 REG3 SW6 VOUT3 REG6 BT6 FB3 FB6 VIN PVIN4 SW4D SW5D VOUT4 VOUT5 SW5U BT5U FB5 COMP5 VIN BT4D BT5D PVIN5 V5 V3 REG4 REG5 V4 SW4U BT4U FB4 COMP4 VDDI VBUS VIN ONOFF SCL SDA VIN VDDI FREQ V2 VIN VIN RST SS VIN AGND PGND
TYPICAL APPLICATIONS Figure 10. 34704A Typical Application Diagram VIN VIN 34704B (21) REG8 VG SW8 BT8 VG REG8 SW1 BT1 VIN FB8 PVIN2 VIN BT2D PVIN5 SW2D BT5D VOUT2 SW5D V2 VOUT5 V5 REG2 SW2U REG5 BT2U SW5U FB2 BT5U COMP2 FB5 COMP5 PVIN3 VIN BT3 PVIN4 SW3 BT4D SW4D REG3 VOUT4 V4 VIN VOUT3 V3 FB3 REG4 SW4U BT4U VIN FB4 COMP4 ONOFF VDDI VIN VBUS VIN VIN SCL SDA FREQ V2 VIN SS RST VIN AGND PGND (EXPAD) (20) Notes 20.
PACKAGING PACKAGE DIMENSIONS PACKAGING PACKAGE DIMENSIONS For the most current package revision, visit www.freescale.com and perform a keyword search using the “98A” listed below.
PACKAGING PACKAGE DIMENSIONS (CONTINUED) PACKAGE DIMENSIONS (CONTINUED) EP SUFFIX 56-PIN 98ASA10751D REVISION A 34704 Analog Integrated Circuit Device Data Freescale Semiconductor 51
PACKAGING PACKAGE DIMENSIONS (CONTINUED) PACKAGE DIMENSIONS (CONTINUED) EP SUFFIX 56-PIN 98ASA10751D REVISION A 34704 52 Analog Integrated Circuit Device Data Freescale Semiconductor
REVISION HISTORY REVISION HISTORY REVISION DATE DESCRIPTION OF CHANGES 2.0 4/2008 • Initial Release 3.0 6/2008 • • • • 4.0 6/2009 • Updated category from Advance Information to Technical Data. 5.0 1/2010 • • • • • • • • • • • • • • • 6.0 9/2011 • • • • • • 7.0 12/2011 • Changed RST Leakage Current from 1 mA to 1 μA in the Static Electrical Characteristics table on page 9.
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