Datasheet

Analog Integrated Circuit Device Data
Freescale Semiconductor 10
MC34708
Pin Connections
R2 SW4ALX O
SW4A switch node connection
P6 SW4AFB I
SW4A feedback
P2 GNDSW4A GND
Ground for SW4A
R4 SW4BIN I
SW4B input
R5 SW4BLX O
SW4B switch node connection
P5 SW4BFB I
SW4B feedback
R6 GNDSW4B GND
Ground for SW4B
M6 SW4CFG I
SW4A/B mode configuration
N7, P7, R7 SW5IN I
SW5 input
N8, P8, R8 SW5LX O
SW5 output
M7 SW5FB I
SW5 feedback
N9, P9, R9 GNDSW5 GND
Ground for SW5
L8 GNDREF1 GND
Ground reference for Switching Regulators
F12, F13 SWBSTIN I
Boost Regulator BP supply
J14, J15 SWBSTLX O
SWBST switch node connection
H12 SWBSTFB I
Boost Regulator feedback
G12, G13 GNDSWBST GND
Ground for boost Regulator
LDO Regulators
L11 VINREFDDR I
VREFDDR input supply
P15 VREFDDR O
VREFDDR regulator output
K10 VHALF O
Half supply reference for VREFDDR
J11 VINPLL I
VPLL input supply
J12 VPLL O
VPLL regulator output
J10 VDACDRV O
Drive output for VDAC regulator using external PNP device
K12 VDAC O
VDAC regulator output
L14
LDOVDD I
Supply pin for VUSB2, VDAC, and VGEN2. Must always be connected to the same supply as
the PNP emitter. Recommended to use BP as the LDOVDD supply. See
Figure 38 for a typical
connection diagram.
M14
VUSB2DRV
I
1. VUSB2 input using internal PMOS FET
O
2. Drive output for VUSB2 regulator using external PNP device
L13 VUSB2 O
VUSB2 regulator output
N14 VINGEN1 I
VGEN1 input supply
M13 VGEN1 O
VGEN1 regulator output
N15
VGEN2DRV
I
1. VGEN2 input using internal PMOS FET
O
2. Drive output for VGEN2 regulator using external PNP device
K11 VGEN2 O
VGEN2 regulator output
J13 VSRTC O
Output regulator for SRTC module on processor
K13 GNDREG1 GND
Ground for regulators 1
Table 3. MC34708 Pin Definitions (continued)
Pin Number Pin Name
Pin
Function
Definition