Datasheet

Analog Integrated Circuit Device Data
Freescale Semiconductor 142
MC34708
Typical Applications
8 Typical Applications
Figure 38 presents a typical application diagram of the MC34708 PMIC together with its functional components. For details on
component references and additional components such as filters, refer to the individual sections.
8.1 Application Diagram
Figure 38. Typical Application Schematic
BP
RESETB
RESETBMCU
WDI
Switchers
GNDADC
ADIN11
MUX
10 Bit GP
ADC
INT
CLK32K
XTAL1 XTAL2
GNDRTC
LICELL
GPIO Control
GPIOLV1 GPIOLV2
RTC +
Calibration
GNDSW2
SW2FB
SW2LX
SW1IN
SW2IN
O/P
Drive
`
GNDSW1A
SW1FB
SW3IN
O/P
Drive
GNDSW3
SW3FB
SW3LX
GNDSWBST
SWBSTFB
SWBSTIN
SWBSTLX
O/P
Drive
PWRON1
PUMS1
Monitor
Timer
O/P
Drive
PLL
32 KHz
Crystal
Osc
STANDBY
GPIOLV3
To Interrupt
Section
Die Temp &
Thermal Warning
Detection
LCELL
Switch
Enables &
Control
SPI Result
Registers
Interrupt
Inputs
GNDCTRL
Core Control Logic , Timers, & Interrupts
32 KHz
Internal
Osc
GPIOLV4
CHRGLEDR
Input/Battery
Monitoring
LICELL, UID, Die Temp, GPO4
ADIN10
CLK32KMCU
GNDREG1
GNDREG2
ADIN9
A/D Result
A/D
Control
ICTEST
32 KHz
Buffers
Output Pin
Input Pin
Bi-directional Pin
Package Pin Legend
SPI
Interface
+
Muxed
I2C
Optional
Interface
CS
CLK
GNDSPI
MISO
SPI
Registers
MOSI
Shift Register
Shift Register
SPIVCC
To Enables & Control
To
Trimmed
Circuits
SPI
Control
Logic
Trim-In-Package
Startup
Sequencer
Decode
Trim?
PUMSx
Control
Logic
Li Cell
Charger
SW2
LP
1000 mA
Buck
SW3
INT MEM
500 mA
Buck
SWBST
380 mA
Boost
Voltage /
Current
Sensing &
Translation
34708
SW4
Dual Phase
DDR
1000 mA
Buck
VSRTC
VSRTC
VINREFDDR
VPLL
VPLL
50 mA
Pass
FET
VREFDDR
10mA
VREFDDR
SPI Control
VBUS
VINUSB
VUSB
UID
Connector
Interface
Best
of
Supply
LICELL
BP
Reference
Generation
VCOREDIG
GNDCORE
VCORE
VCOREREF
V
B
U
S
/
I
D
D
e
t
e
c
t
o
r
s
,
H
o
s
t
A
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t
o
d
e
t
e
c
t
i
o
n
U
A
R
T
S
w
i
t
c
h
e
s
A
u
d
i
o
S
w
i
t
c
h
e
s
VUSB
Regulator
SUBSANA1
SUBSPWR1
SUBSREF
SUBSGND
SUBSPWR2
SUBSANA3 SUBSANA2 SUBSLDO
VINPLL
PUMS2
PWRON2
GLBRST
SW5IN
O/P
Drive
GNDSW5
SW5FB
SW5LX
SW5
I/O
1000 mA
Buck
VUSB2
350mA
VDACDRV
VDAC
VUSB2
VUSB2DRV
VDAC
250mA
GNDACHRG
SW1ALX
DVS
CONTROL
CFP
CFN
BATTISNSCCN
CHRGLEDG
DM
DP
DPLUS
DMINUS
OVP
SPKR
SW1PWGD
SW2PWGD
PWM
Outputs
PWM1 PWM2
SPKL
MIC
RXD
TXD
GNDSW1B
O/P
Drive
SW1BLX
SW4AIN
GNDSW4A
SW4FBA
O/P
Drive
SW4ALX
SW4BIN
GNDSW4B
SW4BFB
O/P
Drive
SW4BLX
GNDUSB
SW4CFG
LEDVDD
VDDLP
VGEN1
250mA
VGEN2DRV
VGEN2
VGEN2
250mA
Pass
FET
VGEN1
Pass
FET
VINGEN1
PUMS3
PUMS4
SDWNB
Digital Core
PRETMR
TRICKLESEL
CHRGFB
BATTISNSN
BATTISNSP
BP
CHRGLX
VBUSVIN
AUXVIN
GAUX
GBAT
BPSNS
GOTG
VAUX
General Purpose
LED drivers
SW1
Dual Phase
GP
2000 mA
Buck
SW1CFG
VALWAYS
SW1VSSSNS
VHALF
BPTHERM
NTCREF
BATT
BATTISNSCCP
ITRIC
PUMS5
GPIOVDD
GNDGPIO
GNDREF1
GNDREF2
GNDREF
LDOVDD
Pass
FET
100n
Coin Cell
Battery
2.2u
SWBST
100pF
1u
1u
SPI
SW5
General Purpose ADC Inputs:
i.e., PA thermistor, Light Sensor, Etc.
To/From
Audio IC
To/From
AP
To/From
USB Cable
100n
BP
10u
10u
BP
BP
2x22u
SWBST
Output
(Boost)
2.2u
2.2u
BP
SW4B
1u
BP
2.2u
1.0u
2 x22u
SW1 Output
BP
4.7u
BP
4.7u
1.0u
22u
SW2 Output
To AP
BP
4.7u
1.0u
10u
SW3 Output
1.0u
10u
SW4A Output
BP
4.7u
4.7u
1.0u
10u
SW4B Output
1.0u
22u
SW5 Output
BP
4.7u
To AP
2.2u
BP
2.2u
BP
SW5
2.2u
BP
2.2u
VCOREDIG
BP
100n
BP
To AP
To Peripherals
To GND, or
VCOREDIG
To/From
AP
On/Off
Button
Wakeup from AP
Reset
button
32.768 KHz
Crystal
15p
SW5 or SW3
GNDCHRG
0.1uF
100K
100K
100K
100K
100K
1u
ADIN14/TSY1
ADIN15/TSY2
ADIN13/TSX2
TSREF
Touch
Screen
Interface
ADIN12/TSX1
Touch
Screen
Interface
2.2u
100n
C1
C2
D1
D2
C54
C56
C50
C51
C52
C49
C47
C46
C5 L2
C6/C7
R18
C10
L4
C11
R19
C13
L5
C14
C16
L6
C17
C22
C20
L7
C23
L8
L9
C25
D3
C26
C57
C55
C28
C30
C29
Q1
Q3
C36
C38
Q5
C41
C43
C45
R20R4
C44
18p
Y1
R3
C19
D8
D10
D11
D12
D13
D14
2.2uF
C34
VIN
CE
VOUT
GND
VDDLP
100nF
100nF
C58C59
D15
1.5V LDO
R24
50m
R23
100m
R22
40m
LICELL
BP
D16
D17
Workaround for erratum #23.
If back-up coin cell is n ot present in t he applicatio n, D16 and D17 are not
required and BP is connected directly to VIN of the LDO
CLK32KVCC
100n
C35
VCOREDIG