Datasheet
Analog Integrated Circuit Device Data
Freescale Semiconductor 148
MC34708
Typical Applications
Figure 39. Recommended Shielding for Critical Signals.
• These signals can be placed on an outer layer of the board to reduce their capacitance in respect to the ground plane.
• The crystal connected to the XTAL1 and XTAL2 pins must not have a ground plane directly below.
• The following are clock signals: CLK, CLK32K, CLK32KMCU, XTAL1, and XTAL2. These signals must not run parallel to
each other, or in the same routing layer. If it is necessary to run clock signals parallel to each other, or parallel to any other
signal, then follow a MAX PARALLEL rule as follows:
• Up to 1 inch parallel length – 25 mil minimum separation
• Up to 2 inch parallel length – 50 mil minimum separation
• Up to 3 inch parallel length – 100 mil minimum separation
• Up to 4 inch parallel length – 250 mil minimum separation
• Care must be taken with these signals not to contaminate analog signals, as they are high frequency signals.
Another good practice is to trace them perpendicularly on different layers, so there is a minimum area of
proximity between signals.
2. The R1 resistor must run in parallel to the BATTISNSN and BATTISNSP traces.
8.3.5 Differential Routing
1. DP and DM traces should be routed as 90 ohm differential signals.
2. DPLUS and DMINUS traces should be routed as 90 ohm differential signals.
8.3.6 Switching Regulator Layout Recommendations
1. Per design, the MC34708 is designed to operate with only 1 input bulk capacitor. However, it is recommended to add a
high frequency filter input capacitor (CIN_hf), to filter out any noise at the regulator input. This capacitor should be in the
range of 100
nF and should be placed right next to or under the IC, closest to the IC pins.
2. Make high-current ripple traces low inductance (short, high W/L ratio).
3. Make high-current traces wide or copper islands.
4. Make high-current traces SYMETRICAL for dual–phase regulators (SW1, SW4).
