Datasheet

Analog Integrated Circuit Device Data
27 Freescale Semiconductor
MC34708
Functional Block Description
7.3 Clocking and Oscillators
7.3.1 Clock Generation
A system clock is generated for internal digital circuitry as well as for external applications utilizing the clock output pins. A crystal
oscillator is used for the 32.768 kHz time base and generation of related derivative clocks. If the crystal oscillator is not running
(for example, if the crystal is not present), an internal 32
kHz oscillator will be used instead.
Support is also provided for an external Secure Real Time Clock (SRTC) which may be integrated on a companion system
processor IC. For media protection in compliance with Digital Rights Management (DRM) system requirements, the
CLK32KMCU can be provided as a reference to the SRTC module where tamper protection is implemented.
7.3.1.1 Clocking Scheme
The internal 32 kHz oscillator is an integrated backup for the crystal oscillator, and provides a 32.768 kHz nominal frequency at
60% accuracy, if running. The internal oscillator only runs if a valid supply is available at BP, and would not be used as long as
the crystal oscillator is active. In absence of a valid supply at the BP supply node, the crystal oscillator will continue to operate
as it is powered from the coin cell battery. All control functions will run off the crystal derived frequency, occasionally referred to
as “32
kHz” for brevity’s sake.
During the switch-over between the two clock sources (such as when the crystal oscillator is starting up), the output clock is
maintained at a stable active low or high phase of the internal 32
kHz clock to avoid any clocking glitches. If the XTAL clock
source suddenly disappears during operation, the IC will revert back to the internal clock source. Given the unpredictable nature
of the event and the startup times involved, the clock may be absent long enough for the application to shutdown during this
transition due to various reasons, for example a sag in the regulator output voltage or absence of a signal on the clock output pins.
A status bit, CLKS, is available to indicate to the processor which clock is currently selected: CLKS = 0 when the internal RC is
used and CLKS = 1 if the crystal source is used. The CLKI interrupt bit will be set whenever a change in the clock source occurs,
and an interrupt will be generated if the corresponding CLKM mask bit is cleared.
VCORE (ANALOG CORE SUPPLY)
V
CORE
Output voltage
• ON mode
• OFF and RTC mode
-
-
2.775
0.0
-
-
V
(35)
C
CORE
V
CORE
bypass capacitor
- 1.0 - F
VCOREREF (BANDGAP VOLTAGE/ REGULATOR REFERENCE)
V
COREREF
Output voltage
- 1.2 - V
(35)
Absolute Accuracy
- 0.5 - %
Temperature Drift
- 0.25 - %
C
COREREF
V
COREREF
bypass capacitor
- 100 - nF
Notes
35. 3.0 V < BP < 4.5 V, no external loading on VCOREDIG, VDDLP, VCORE, or VCOREREF. Extended operation down to UVDET, but no
system malfunction.
36. Powered by VCOREDIG
37. Maximum capacitance on V
DDLP
should not exceed 1000 pF, including the board capacitance.
Table 14. Core Voltages Electrical Specifications
Characteristics noted under conditions BP = 3.6 V, V
BUS
= 5.0 V, - 40 C  T
A
 85 C, unless otherwise noted. Typical values
at BP = 3.6 V and T
A
= 25 °C under nominal conditions, unless otherwise noted.
Symbol Characteristic Min Typ Max Unit Notes