Datasheet
Analog Integrated Circuit Device Data
Freescale Semiconductor 42
MC34708
Functional Block Description
7.5.3.6 Timers
The different timers as used by the state machine are listed in Table 26. This listing does not include RTC timers for timekeeping.
A synchronization error of up to one clock period may occur with respect to the occurrence of an asynchronous event, the duration
listed below is therefore the effective minimum time period.
7.5.3.6.1 Timing Diagrams
A Turn On event timing diagrams shown in Figure 7.
Figure 7. Power Up Timing Diagram
Table 25. Turn OFF Voltage Threshold
VBAT_TRKL[1:0] Turn off Voltage threshold
00 2.8
01 2.9
10 3.0 (default)
11 3.1
Table 26. Timer Main Characteristics
Timer Duration Clock
Under-voltage Timer 4.0 ms 32 k/32
Reset Timer 40 ms 32 k/32
Watchdog Timer 128 ms 32 k/32
Power Cut Timer Programmable 0 to 8 seconds
in 31.25
ms steps
32 k/1024
RESETB
WDI
INT
UV Masking
8 ms 20 ms 12 ms
Power Up Sequencer
Turn On Verification
128 ms
2 - Cold Start 1 - Off
System Core Active
3 - Watchdog 4 - On 1 - Off 3- Watchdog
Power up of the system upon a Turn On Event followed by a transition to the On state if WDI is pulled high ... or transition to Off state if WDI remains low
Turn On Event
Sequencer time slots
WDI Pulled Low
= Indeterminate State
ow
Turn on Event is based on PWRON being pulled low
8 ms
