Datasheet

Analog Integrated Circuit Device Data
45 Freescale Semiconductor
MC34708
Functional Block Description
7.5.4 Buck Switching Regulators
Six buck switching regulators are provided with integrated power switches and synchronous rectification. In a typical application,
SW1 and SW2 are used for supplying the application processor core power domains. Split power domains allow independent
DVS control for processor power optimization, or to support technologies with a mix of device types with different voltage ratings.
SW3 is used for powering internal processor memory as well as low voltage peripheral devices and interfaces which can run at
the same voltage level. SW4A/B is used for powering external DDR memory as well as low voltage peripheral devices and
interfaces, which can run at the same voltage level. SW5 is used to supply the I/O domain for the system.
The buck regulators are supplied from the system supply BP, which is drawn from the main battery or the external battery charger
(when present).
The switching regulators can operate in different modes depending on the load conditions. These modes can be set through the
SPI/I
2
C and include a PFM mode, an Automatic Pulse Skipping mode (APS), and a PWM mode. The previous selection is
optimized to maximum battery life based on load conditions.
Buck modes of operation are programmable for explicitly defined or load-dependent control.
During soft-start of the buck regulators, the controller transitions through the PFM, APS, and PWM switching modes. 3.0 ms
(typical) after the output voltage reaches regulation, the controller transitions to the selected switching mode. Depending on the
particular switching mode selected, additional ripple may be observed on the output voltage rail as the controller transitions
between switching modes. The regulators are turned on in APS mode by default. After the start-up sequence is complete, all
switching regulators should be set to PFM/PWM mode, depending on system load for best performance.
Point of load feedback is intended for minimizing errors due to board level IR drops.
7.5.4.1 General Control
Operational modes of the Buck regulators can be controlled by direct SPI programming, altered by the state of the STANDBY
pin, by direct state machine influence (entering Off or low power Off states, for example), or by load current magnitude when so
configured (APS mode). Available modes include PWM, PFM, APS and OFF. For light loading, the regulators should be put into
PFM mode to optimize efficiency.
Provisions are made for maintaining PFM operation in User off and Memhold modes, to support state retention for faster startup
from the Low Power Off modes for Warm Start or Warm Boot. SWxMODE[3:0] bits will be reset to their default values defined by
PUMSx settings by the startup sequencer.
Table 32 summarizes the Buck regulators programmability for Normal and Standby modes.
Table 31. Buck Operating Modes
Mode Description
OFF
The regulator is switched off and the output voltage is discharged
PFM
The regulator is switched on and set to PFM mode operation. In this mode, the regulator
is always running in PFM mode. Useful at light loads for optimized efficiency.
APS
The regulator is switched on and set to Automatic Pulse Skipping. In this mode the
regulator moves automatically between pulse skipping and full PWM mode depending
on load conditions.
PWM
The regulator is switched on and set to PWM mode. In this mode the regulator is always
in full PWM mode operation regardless of load conditions.
Table 32. Switching regulator Mode Control for Normal and Standby Operation
SWxMODE[3:0] Normal Mode Standby Mode
0000 Off Off
0001 PWM Off
0010 Reserved Reserved
0011 PFM Off