Datasheet

Analog Integrated Circuit Device Data
Freescale Semiconductor 90
MC34708
Functional Block Description
what ID resistor is attached and the Power Supply Type Identification or PSTI circuit will determine what type of power supply is
connected. The 32 kHz crystal must be placed across the XTAL 1 and XTAL2 pins for the accessory identification to work.
An identification conclusion is made when the identification flow is finished. The corresponding bit in the USB Device Type/Status
register is set to indicate the device type, and the ATTACH bit in the USB Interrupt Status register is set to inform the baseband.
If the attached accessory can't be identified, the Unknown_Atta bit in the USB Interrupt Status register is set.
The MC34708 will automatically detect three types of accessories.
1. Recognized and supported. The following accessories are identified and configured automatically: USB port, UART, Audio
Type 1 cable, TTY accessory, USB jig cables, and UART jig cables.
2. Recognized but not supported. The following accessories can be identified but are not supported by the MC34708 PMIC:
A/V cables, Phone-Powered Devices, Audio Type 2 cables, dedicated charger, USB charger, A/V charger, 5-wire type 1
and type 2 chargers. The PMIC will detect that a charger is attached, when the VBUS voltage transitions above the
setpoint, which is defaulted to 4.35
V. When above this threshold for longer than the debounce period (VBUSDB[1:0]), the
USBDET interrupt is generated and USBDETS is set to a one. When the VBUS input falls below the VBUSTL[2:0]
threshold, the USBDET interrupt is generated immediately without any debounce and the USBDETS bit is low. See
Table 89 and Table 90. The USBOVP interrupt will be triggered when an over-voltage on VBUS (>6.5 V typical) is
detected during a device attach. The over-voltage interrupt is debounce by SUP_OVP_DB[1:0] bits on Table 91.
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3. Not recognized accessories. All accessories that are not recognized are identified as unknown accessories.
Table 89. VBUS Debounce Times
VBUSDB[1:0] Debounce Time (ms)
00 0
01 10
10 20
11 30
Table 90. VBUS High/low Detection Threshold
VBUSTH[2:0] Voltage VBUSTL[2:0] Voltage
000 4.05 000 3.55
001 4.15 001 3.65
010 4.25 010 3.75
011 4.35 (default) 011 3.85 (default)
100 4.45 100 3.95
101 4.55 101 4.05
110 4.65 110 4.15
111 4.75 111 4.25
Table 91. Over-voltage Debounce Time SUP_OVP_DB[1:0]
SUP_OVP_DB[1:0] Debounce Time
00 0 (default 1.0)
01 2 RTC clock cycles
10 4 RTC clock cycles
11 8 RTC clock cycles (default 2.0)