Datasheet

Analog Integrated Circuit Device Data
Freescale Semiconductor 16
34709
General Product Characteristics
MISO, INT CMOS
Output Low
-100 A 0.0 0.2 V
MISO
(15)
(24)
Output High
100 A SPIVCC - 0.2 SPIVCC V
MISO
(15)
(24)
PUMS1,2,3,4,5
Input Low
PUMSxS = 0
- 0.0 0.3 V
(17)
Input High
PUMSxS = 1
- 1.0 VCOREDIG V
(17)
ICTEST
Input Low
- 0.0 0.3 V
(18)
Input High
- 1.1 1.7 V
(18)
SW1CFG, SW4CFG
Input Low
- 0.0 0.3 V
Input Mid
- 1.3 2.0 V
Input High
- 2.5 3.1 V
Notes
15. SPIVCC is typically connected to the output of buck regulator SW5 and set to 1.800 V
16. Input has internal pull-up to VCOREDIG equivalent to 200 kOhm
17. Input state is latched in first phase of cold start, refer to Serial Interfaces for a description of the PUMS configuration
18. Input state is not latched
19. A weak pull-down represents a nominal internal pull-down of 100 nA, unless otherwise noted
20. RESETB, RESETBMCU, SDWNB, SW1PWGD, SW2PWGD have open-drain outputs, external pull-ups are required
21. SPIVCC needs to remain enabled for proper detection of WDI High to avoid involuntary shutdown
22. The maximum should never exceed the maximum rating of the pin as given in Pin Connections
23. The weak pull-down on CS is disabled if a VIH is detected at start-up to avoid extra consumption in I
2
C mode
24. The output drive strength is programmable
Table 8. Pin Logic Thresholds
Pin Name
Internal
Termination
(19)
Parameter Load Condition Min
Max
(22)
Unit Notes