Datasheet

Signal/Connection Descriptions
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Freescale Semiconductor 23
GPIOB5
(T1)
(FAULT3)
(SCLK)
4 32 4 Input/
Output
Input/
Output
Input
Input
Input,
internal
pullup
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
T1 — Dual timer module channel 1 input/output.
FAULT3 — PWM fault input 3 used for disabling selected PWM
outputs in cases where fault conditions originate off-chip.
SCLK — SPI serial clock. In master mode, this pin serves as an
output, clocking slaved listeners. In slave mode, this pin serves as
the data clock input.
After reset, the default state is GPIOB5.
GPIOB6
(SDA)
(ANA13 and
CMP0_P2)
(CLKIN)
26 1 29 1 Input/
Output
Input/Open-
drain
Output
Analog
Input
Input
Input,
internal
pullup
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
SDA — The I
2
C serial data line.
ANA13 and CMP0_P2 — Analog input to channel 13 of ADCA and
positive input 2 of analog comparator 0.
External Clock Input — This pin serves as an external clock input.
When used as an analog input, the signal goes to the ANA13 and
CMP0_P2.
After reset, the default state is GPIOB6.
GPIOB7
(TXD)
(SCL)
(ANA11 and
CMP2_M3)
3 31 3 Input/
Output
Input/
Output
Input/Open-
drain
Output
Analog
Input
Input,
internal
pullup
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
TXD — The SCI transmit data output or transmit/receive in single
wire operation.
SCL — The I
2
C serial clock.
ANA11 and CMP2_M3 — Analog input to channel 11 of ADCA and
negative input 3 of analog comparator 2.
When used as an analog input, the signal goes to the ANA11 and
CMP2_M3.
After reset, the default state is GPIOB7.
Table 5. 56F8006/56F8002 Signal and Package Information (continued)
Signal
Name
28
SOIC
32
LQFP
32
PSDI
P
48
LQFP
Type
State
During
Reset
Signal Description