Datasheet

Peripheral Register Memory Map and Reset Value
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Freescale Semiconductor 93
C3 0000 PGA1 PGA1_STS 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RUNNING
STCOMP
C4–DF — PGA1 Reserved RESERVED
E0 0200 SCI SCI_RATE SBR FRAC_SBR
E1 0000 SCI
SCI_
CTRL1
LOOP
SWAI
RSRC
M
WAKE
POL PE PT TEIE TIIE RFIE REIE TE RE RWU SBK
E2 0000 SCI
SCI_
CTRL2
0 0 0 0 0 0 0 0 0 0 0 0
LIN _MODE
0 0 0
E3 C000 SCI SCI_STAT
TDRE
TIDLE
RDRF
RIDLE
OR NF FE PF 0 0 0 0LSE0 0RAF
E4 0000 SCI SCI_DATA
0 0 0 0 0 0 0 RECEIVE_TRANSMIT_DATA
E5–FF — SCI Reserved RESERVED
00 6141 SPI
SPI_
SCTRL
SPR DSO
ERRIE
MODFEN
SPRIE
SPMSTR
CPOL
CPHA
SPE
SPTIE
SPRF
OVRF
MODF
SPTE
01 000F SPI
SPI_
DSCTRL
WOM
0 0BD2X
SSB_IN
SSB_DATA
SSB_ODM
SSB_AUTO
SSB_DDR
SSB_STRB
SSB_OVER
SPR3 DS
02 0000 SPI SPI_DRCV R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0
03 0000 SPI SPI_DXMIT T15 T14 T13 T12 T11 T10 T9 T8 T7 T6 T5 T4 T3 T2 T1 T0
04–1F — SPI Reserved RESERVED
20 0000 I2C I2C_ADDR 0 0 0 0 0 0 0 0 AD7 AD6 AD5 AD4 AD3 AD2 AD1 0
21 0000 I2C
I2C_
FREQDIV
0 0 0 0 0 0 0 0MULT ICR
Table 44. Detailed Peripheral Memory Map (continued)
Offset
Addr.
(Hex)
Reset
Value
(Hex)
Periph. Register
Bit
15
1413121110987654321
Bit
0