Datasheet

MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Freescale Semiconductor94
Peripheral Register Memory Map and Reset Value
22 0000 I2C I2C_CR1 0 0 0 0 0 0 0 0
IICEN
IICIE MST TX TXAK RSTA 0 0
23 0080 I2C I2C_SR
0 0 0 0 0 0 0 0 TCF IAAS
BUSY
ARBL 0 SRW IICIF
RXAK
24 0000 I2C I2C_DATA 0 0 0 0 0 0 0 0DATA
25 0000 I2C I2C_CR2
0 0 0 0 0 0 0 0
GCAEN
ADEXT
0 0 0 AD10 AD9 AD8
26 0000 I2C
I2C_SMB_
CSR
0 0 0 0 0 0 0 0
RESERVED RESERVED
SIICAEN
TCKSEL
SLTF SHTF 0 0
27 0000 I2C
I2C_
ADDR2
0 0 0 0 0 0 0 0 SAD7 SAD6 SAD5 SAD4 SAD3 SAD2 SAD1 0
28 0000 I2C I2C_SLT1 0 0 0 0 0 0 0 0
SSLT15 SSLT14 SSLT13 SSLT12 SSLT11 SSLT10
SSLT9 SSLT8
29 0000 I2C I2C_SLT2 0 0 0 0 0 0 0 0
SSLT7 SSLT6 SSLT5 SSLT4 SSLT3 SSLT2 SSLT1 SSLT0
30–3F — I2C Reserved RESERVED
40 0302 COP
COP_
CTRL
0 0 0 0 0 0 PSS 0 CLKSEL
CLOREN
CSEN
CWEN
CEN CWP
41 FFFF COP
COP_
TOUT
TIMEOUT
42 FFFF COP
COP_
CNTR
COUNT_SERVICE
43–5F — COP Reserved
RESERVED
Table 44. Detailed Peripheral Memory Map (continued)
Offset
Addr.
(Hex)
Reset
Value
(Hex)
Periph. Register
Bit
15
1413121110987654321
Bit
0