Datasheet

MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Freescale Semiconductor100
Peripheral Register Memory Map and Reset Value
0D 0000 GPIOE
GPIOE_
SLEW
0 0 0 0 0 0 0 0SLEW
0E–1F — GPIOE Reserved
RESERVED
20 00FF GPIOF
GPIOF_
PUR
0 0 0 0 0 0 0 0 0 0 0 0PUR
21 0000 GPIOF GPIOF_DR
0 0 0 0 0 0 0 0 0 0 0 0DR
22 0000 GPIOF
GPIOF_
DDR
0 0 0 0 0 0 0 0 0 0 0 0 DDR
23 0080 GPIOF
GPIOF_
PER
0 0 0 0 0 0 0 0 0 0 0 0 PER
24 — GPIOF Reserved
RESERVED
25 0000 GPIOF
GPIOF_
IENR
0 0 0 0 0 0 0 0 0 0 0 0IENR
26 0000 GPIOF
GPIOF_
IPOLR
0 0 0 0 0 0 0 0 0 0 0 0IPOLR
27 0000 GPIOF
GPIOF_
IPR
0 0 0 0 0 0 0 0 0 0 0 0IPR
28 0000 GPIOF
GPIOF_
IESR
0 0 0 0 0 0 0 0 0 0 0 0 IESR
29 — GPIOF Reserved
RESERVED
2A 0000 GPIOF
GPIOF_
RAWDATA
0 0 0 0 0 0 0 0 0 0 0 0RAWDATA
2B 0000 GPIOF
GPIOF_
DRIVE
0 0 0 0 0 0 0 0 0 0 0 0DRIVE
2C 00FF GPIOF GPIOF_IFE
0 0 0 0 0 0 0 0 0 0 0 0IFE
2D 0000 GPIOF
GPIOF_
SLEW
0 0 0 0 0 0 0 0 0 0 0 0SLEW
2E–3F — GPIOF Reserved
RESERVED
Table 44. Detailed Peripheral Memory Map (continued)
Offset
Addr.
(Hex)
Reset
Value
(Hex)
Periph. Register
Bit
15
1413121110987654321
Bit
0