Datasheet

MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Freescale Semiconductor104
Peripheral Register Memory Map and Reset Value
02 0000 PDB
PDB_
DELAYB
DELAYB
03 FFFF PDB PDB_MOD MOD
04 FFFF PDB
PDB_
COUNT
COUNT
05–1F — PDB Reserved
RESERVED
20 0000 RTC RTC_SC 0 0 0 0 0 0 0 0 RTIF RTCLKS RTIE RTCPS
21 0000 RTC RTC_CNT 0 0 0 0 0 0 0 0 RTCCNT
22 0000 RTC RTC_MOD 0 0 0 0 0 0 0 0RTCMOD
23–FF — RTC Reserved RESERVED
00 0000 HFM
FM_
CLKDIV
0 0 0 0 0 0 0 0
DIVLD
PRDIV8
DIV
01 0000 HFM FM_CNFG 0 0 0 0 0
LOCK
0 AEIE
CBEIE
CCIE
KEYACC
0 0 0LBTSBTS
03 -000
3
HFM FM_SECHI
KEYEN
SECSTAT
0 0 0 0 0 0 0 0 0 0 0 0 0 0
04 0000 HFM
FM_
SECLO
0 0 0 0 0 0 0 0 0 0 0 0 0 0 SEC
06–0F — HFM Reserved
RESERVED
10 FFFF
6
HFM FM_PROT PROTECT
11 — HFM Reserved RESERVED
13 00C0 HFM FM_USTAT
0 0 0 0 0 0 0 0
CBEIF
CCIF
PVIOL
ACCERR
0
BLANK
0 0
14 0000 HFM FM_CMD 0 0 0 0 0 0 0 0 0CMD
Table 44. Detailed Peripheral Memory Map (continued)
Offset
Addr.
(Hex)
Reset
Value
(Hex)
Periph. Register
Bit
15
1413121110987654321
Bit
0