Datasheet

MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Specifications
Freescale Semiconductor52
LPwait
3
32.768 kHz device clock;
Clocked by a 32.768 kHz external crystal
oscillator in power down;
PLL disabled;
All peripheral modules disabled and clock
gated off;
processor core in wait state
157.55 A 1.57 mA 380 A 3.4 mA 398 A 3.6 mA
Stop 32 MHz device clock
relaxation oscillator (ROSC) in high speed
mode;
PLL engaged;
all peripheral module and core clocks are off;
ADC/DAC/comparator powered off;
processor core in stop state
8.21 mA 65.51 A 9.8 mA 130 A 10.3 mA 132 A
LSstop
2
200 kHz device clock;
relaxation oscillator (ROSC) in standby
mode;
PLL disabled;
all peripheral modules disabled and clock
gated off;
processor core in stop state.
194.69 A 65.51 A 340 A120 A357 A 123 A
LPstop
2
32.768 kHz device clock;
Clocked by a 32.768 kHz external crystal
relaxation oscillator (ROSC) in power down;
PLL disabled;
all peripheral modules disabled and clock
gated off;
processor core in stop state.
2.77 A 13.99 nA 45 A3.0 A 58 A3.6 A
PPD
4
with
XOSC
32.768 kHz clock fed on XTAL
RTC or COP monitoring XOSC (but no
wakeup)
processor core in stop state
879.72 nA 11.56 nA 18 A2.4 A 22 A3.0 A
PPD with LP
oscillator
(1 kHz)
enabled
RTC or COP monitoring LP oscillator (but no
wakeup);
processor core in stop state.
499.15 nA 13.9 nA 14 A2.4 A 17 A 2.8 mA
PPD with no
clock
monitoring
RTC and LP oscillator are disabled;
processor core in stop state.
494.04 nA 12.88 nA 14 A2.4 A 17 A2.8 A
1
No output switching; all ports configured as inputs; all inputs low; no DC loads.
2
Low speed mode: LPR (lower voltage regulator control bit) = 0 and voltage regulator is in full regulation. Characterization only.
3
Low power mode: LPR (lower voltage regulator control bit) = 1; the voltage regulator is put into standby.
4
Partial power down mode: PPDE (partial power down enable bit) = 1; power management controller (PMC) enters partial power
down mode the next time that the STOP command is executed.
Table 22. Supply Current Consumption (continued)
Mode Conditions
Typical @ 3.3 V,
25 °C
Maximum @ 3.6 V,
105 °C
Maximum @ 3.6 V,
125 °C
I
DD
1
I
DDA
I
DD
1
I
DDA
I
DD
1
I
DDA