Datasheet

Peripheral Register Memory Map and Reset Value
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Freescale Semiconductor 89
29 0000 PWM
PWM_
VAL3
PMVAL
2A 0000 PWM
PWM_
VAL4
PMVAL
2B 0000 PWM
PWM_
VAL5
PMVAL
2C 0FFF PWM
PWM_
DTIM0
0 0 0 0PWMDT0
2D 0FFF PWM
PWM_
DTIM1
0 0 0 0PWMDT1
2E FFFF PWM
PWM_
DMAP1
DISMAP_15_0
2F 00FF PWM
PWM_
DMAP2
0 0 0 0 0 0 0 0 DISMAP_23_16
30 0000 PWM
PWM_
CNFG
0
DBG_EN
WAIT_EN
EDG 0
TOPNEG45 TOPNEG23 TOPNEG01
0
BOTNEG45 BOTNEG23 BOTNEG01
INDEP45 INDEP23 INDEP01
WP
31 0000 PWM
PWM_
CCTRL
ENHA
nBX
MSK5 MSK4 MSK3 MSK2 MSK1 MSK0
0 0VLMODE0
SWP45 SWP23 SWP01
32 00-U
1
PWM
PWM_
PORT
0 0 0 0 0 0 0 0 0PORT
33 0000 PWM
PWM_
ICCTRL
0 0 0 0 0 0 0 0 0 0 PEC2 PEC1 PEC0 ICC2 ICC1 ICC0
34 0000 PWM
PWM_
SCTRL
0 0
CINV5 CINV4 CINV3 CINV2 CINV1 CINV0
0SRC20 SRC1 0
SRC0
Table 44. Detailed Peripheral Memory Map (continued)
Offset
Addr.
(Hex)
Reset
Value
(Hex)
Periph. Register
Bit
15
1413121110987654321
Bit
0