Datasheet

MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Freescale Semiconductor90
Peripheral Register Memory Map and Reset Value
35 0000 PWM
PWM_
SYNC
SYNC_OUT_EN
SYNC_WINDOW
36 0000 PWM
PWM_
FFILT0
GSTR0
0 0 0 0 FILT0_CNT FILT0_PER
37 0000 PWM
PWM_
FFILT1
GSTR1
0 0 0 0 FILT1_CNT FILT1_PER
38 0000 PWM
PWM_
FFILT2
GSTR2
0 0 0 0 FILT2_CNT FILT2_PER
39 0000 PWM
PWM_
FFILT3
GSTR3
0 0 0 0 FILT3_CNT FILT3_PER
3B–3F — PWM Reserved RESERVED
40 0000 INTC
INTC_
ICSR
INT IPIC VAB
INT_DIS
ERRF
ETRE
TRBUF
BKPT
STPCNT
41 0000 INTC
INTC_
VBA
0 0 VECTOR_BASE_ADDRESS
42 0000 INTC
INTC_
IAR0
0 0 USER2 0 0 USER1
43 0000 INTC
INTC_
IAR1
0 0 USER4 0 0 USER3
44 0000 INTC
INTC_
IAR2
0 0 USER6 0 0 USER5
45–5F — INTC Reserved
RESERVED
60 001F ADC0
ADC0_
ADCSC1A
0 0 0 0 0 0 0 0
COCO
AIEN
ADCO
ADCH
Table 44. Detailed Peripheral Memory Map (continued)
Offset
Addr.
(Hex)
Reset
Value
(Hex)
Periph. Register
Bit
15
1413121110987654321
Bit
0