Datasheet

Peripheral Register Memory Map and Reset Value
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Freescale Semiconductor 97
A7 0000 GPIOB
GPIOB_
IPR
0 0 0 0 0 0 0 0IPR
A8 0000 GPIOB
GPIOB_
IESR
0 0 0 0 0 0 0 0 IESR
A9 — GPIOB Reserved
RESERVED
AA 0000 GPIOB
GPIOB_
RAWDATA
0 0 0 0 0 0 0 0RAWDATA
AB 0000 GPIOB
GPIOB_
DRIVE
0 0 0 0 0 0 0 0DRIVE
AC 00FF GPIOB GPIOB_IFE
0 0 0 0 0 0 0 0IFE
AD 0000 GPIOB
GPIOB_
SLEW
0 0 0 0 0 0 0 0SLEW
AE–BF — GPIOB Reserved
RESERVED
C0 00FF GPIOC
GPIOC_
PUR
0 0 0 0 0 0 0 0PUR
C1 0000 GPIOC GPIOC_DR
0 0 0 0 0 0 0 0DR
C2 0000 GPIOC
GPIOC_
DDR
0 0 0 0 0 0 0 0 DDR
C3 0080 GPIOC
GPIOC_
PER
0 0 0 0 0 0 0 0 PER
C4 — GPIOC Reserved
RESERVED
C5 0000 GPIOC
GPIOC_
IENR
0 0 0 0 0 0 0 0IENR
C6 0000 GPIOC
GPIOC_
IPOLR
0 0 0 0 0 0 0 0IPOLR
C7 0000 GPIOC
GPIOC_
IPR
0 0 0 0 0 0 0 0IPR
C8 0000 GPIOC
GPIOC_
IESR
0 0 0 0 0 0 0 0 IESR
Table 44. Detailed Peripheral Memory Map (continued)
Offset
Addr.
(Hex)
Reset
Value
(Hex)
Periph. Register
Bit
15
1413121110987654321
Bit
0