Datasheet

Program Map

56F8014 Technical Data, Rev. 11

Freescale Semiconductor 31

4.3 Program Map

The Program Memory map is shown in Table 4-3.

Timer 38 0-2 P:$4C Timer Channel 2

Timer 39 0-2 P:$4E Timer Channel 3

ADC 40 0-2 P:$50 ADCA Conversion Complete

ADC 41 0-2 P:$52 ADCB Conversion Complete

ADC 42 0-2 P:$54 ADC Zero Crossing or Limit Error

PWM 43 0-2 P:$56 Reload PWM

PWM 44 0-2 P:$58 PWM Fault

SWILP 45 -1 P:$5A SW Interrupt Low Priority

1. Two words are allocated for each entry in the vector table. This does not allow the full address range to be referenced

from the vector table, providing only 19 bits of address.

2. If the VBA is set to the reset value, the first two locations of the vector table will overlay the chip reset addresses.

Table 4-3 Program Memory Map

1. All addresses are 16-bit Word addresses.

Begin/End Address Memory Allocation

P: $FF FFFF

P: $00 8800

RESERVED

P: $00 87FF

P: $00 8000

On-Chip RAM

4KB

2. This RAM is shared with Data space starting at address X: $00 0000;

see Figure 4-1.

P: $00 7FFF

P: $00 2000

RESERVED

P: $00 1FFF

P: $00 0000

Internal Program Flash

16KB

Cop Reset Address = $00 0002

Boot Location = $00 0000

Table 4-2 Interrupt Vector Table Contents

(Continued)

Peripheral

Vector

Number

Priority

Level

Vector Base

Address +

Interrupt Function