Datasheet

56F8014 Technical Data, Rev. 11
38 Freescale Semiconductor
ADC_LOLIM6 $17 Low Limit Register 6
ADC_LOLIM7 $18 Low Limit Register 7
ADC_HILIM0 $19 High Limit Register 0
ADC_HILIM1 $1A High Limit Register 1
ADC_HILIM2 $1B High Limit Register 2
ADC_HILIM3 $1C High Limit Register 3
ADC_HILIM4 $1D High Limit Register 4
ADC_HILIM5 $1E High Limit Register 5
ADC_HILIM6 $1F High Limit Register 6
ADC_HILIM7 $20 High Limit Register 7
ADC_OFFST0 $21 Offset Register 0
ADC_OFFST1 $22 Offset Register 1
ADC_OFFST2 $23 Offset Register 2
ADC_OFFST3 $24 Offset Register 3
ADC_OFFST4 $25 Offset Register 4
ADC_OFFST5 $26 Offset Register 5
ADC_OFFST6 $27 Offset Register 6
ADC_OFFST7 $28 Offset Register 7
ADC_PWR $29 Power Control Register
ADC_VREF $2A Voltage Reference Register
Reserved
Table 4-11 Serial Communication Interface Registers Address Map
(SCI_BASE = $00 F0B0)
Register Acronym Address Offset Register Description
SCI_RATE $0 Baud Rate Register
SCI_CTRL1 $1 Control Register 1
SCI_CTRL2 $2 Control Register 2
SCI_STAT $3 Status Register
SCI_DATA $4 Data Register
Table 4-10 Analog-to-Digital Converter Registers Address Map (Continued)
(ADC_BASE = $00 F080)
Register Acronym Address Offset Register Description