Datasheet

Peripheral Memory Mapped Registers

56F8014 Technical Data, Rev. 11

Freescale Semiconductor 39

Table 4-12 Serial Peripheral Interface Registers Address Map

(SPI_BASE = $00 F0C0)

SPI_SCTRL $0 Status and Control Register

SPI_DSCTRL $1 Data Size and Control Register

SPI_DRCV $2 Data Receive Register

SPI_DXMIT $3 Data Transmit Register

Table 4-13 I

C Registers Address Map

(I2C_BASE = $00 F0D0)

I2C_ADDR $0 Address Register

I2C_FDIV $1 Frequency Divider Register

I2C_CTRL $2 Control Register

I2C_STAT $3 Status Register

I2C_DATA $4 Data Register

I2C_NFILT $5 Noise Filter Register

Table 4-14 Computer Operating Properly Registers Address Map

(COP_BASE = $00 F0E0)

COP_CTRL $0 Control Register

COP_TOUT $1 Time-Out Register

COP_CNTR $2 Counter Register

Table 4-15 Clock Generation Module Registers Address Map

(OCCS_BASE = $00 F0F0)

OCCS_CTRL $0 Control Register

OCCS_DIVBY $1 Divide-By Register

OCCS_STAT $2 Status Register

Reserved

OCCS_SHUTDN $4 Shutdown Register

OCCS_OCTRL $5 Oscillator Control Register