Datasheet

Architecture Block Diagram
56F8036 Data Sheet, Rev. 6
Freescale Semiconductor 11
Figure 1-3 56F8036 I/O Pin-Out Muxing (Part 1/5)
To/From IPBus Bridge
Sync0,
Sync1
IPBus
3
DAC SYNC on Figure 1-5
3
2
SYNC0, SYNC1 on Figure 1-7
LIMIT on Figure 1-6
Over/Under
Limits
ANA1
ANB1
ANA4
ANB4
INTC
PIT0
PIT1
PIT2
SYNC
SYNC
SYNC
ADC
GPIOC1
GPIOC5
MSTR_CNT_EN
MSTR_CNT_EN
MSTR_CNT_EN
ANA0
ANA0 on Figure 1-5
ANA2 (V
REFHA
)
GPIOC2
ANA3 (V
REFLA
)
GPIOC3
ANB0
ANB0 on Figure 1-5
ANB3 (V
REFLB
)
GPIOC7
ANB2 (V
REFHA
)
GPIOC6
GPIOC8
GPIOC12