Datasheet
Introduction
56F8036 Data Sheet, Rev. 6
Freescale Semiconductor 17
Part 2 Signal/Connection Descriptions
2.1 Introduction
The input and output signals of the 56F8036 are organized into functional groups, as detailed in Table 2-1.
Table 2-2 summarizes all device pins. In Table 2-2, each table row describes the signal or signals present
on a pin, sorted by pin number.
Table 2-1 Functional Group Pin Allocations
Functional Group Number of Pins
Power Inputs (V
DD
, V
DDA
)3
Ground (V
SS
, V
SSA
)4
Supply Capacitors 2
Reset
1
1. Pins may be shared with other peripherals; see Table 2-2.
1
Pulse Width Modulator (PWM) Ports
1
12
Queued Serial Peripheral Interface (QSPI) Ports
1
4
Timer Module A (TMRA) Ports
1
4
Analog-to-Digital Converter (ADC) Ports
1
10
Queued Serial Communications Interface 0 (QSCI0) Ports
1
2
MSCAN Ports
1
2
Inter-Integrated Circuit Interface (I
2
C) Ports
1
2
Oscillator Signals
1
2
JTAG/Enhanced On-Chip Emulation (EOnCE)
1
4
