Datasheet

56F8036 Data Sheet, Rev. 6
80 Freescale Semiconductor
• Permits selected peripherals to run in Stop mode to generate Stop recovery interrupts
• Controls for programmable peripheral and GPIO connections
• Software chip reset
• I/O short address base location control
• Peripheral protection control to provide runaway code protection for safety-critical applications
• Controls output of internal clock sources to I/O pins
• Four general-purpose software control registers are reset only at power-on
• Peripherals Stop mode clocking control