Datasheet
56F8037/56F8027 Data Sheet, Rev. 8
54 Freescale Semiconductor
TMRA2_CMPLD2 $29 Comparator Load Register 2
TMRA2_CSCTRL $2A Comparator Status and Control Register
TMRA2_FILT $2B Input Filter Register
Reserved
TMRA3_COMP1 $30 Compare Register 1
TMRA3_COMP2 $31 Compare Register 2
TMRA3_CAPT $32 Capture Register
TMRA3_LOAD $33 Load Register
TMRA3_HOLD $34 Hold Register
TMRA3_CNTR $35 Counter Register
TMRA3_CTRL $36 Control Register
TMRA3_SCTRL $37 Status and Control Register
TMRA3_CMPLD1 $38 Comparator Load Register 1
TMRA3_CMPLD2 $39 Comparator Load Register 2
TMRA3_CSCTRL $3A Comparator Status and Control Register
TMRA3_FILT $3B Input Filter Register
Reserved
Table 4-10 Quad Timer B Registers Address Map
(TMRB_BASE = $00 F040)
Register Acronym Address Offset Register Description
TMRB0_COMP1 $0 Compare Register 1
TMRB0_COMP2 $1 Compare Register 2
TMRB0_CAPT $2 Capture Register
TMRB0_LOAD $3 Load Register
TMRB0_HOLD $4 Hold Register
TMRB0_CNTR $5 Counter Register
TMRB0_CTRL $6 Control Register
TMRB0_SCTRL $7 Status and Control Register
TMRB0_CMPLD1 $8 Comparator Load Register 1
TMRB0_CMPLD2 $9 Comparator Load Register 2
TMRB0_CSCTRL $A Comparator Status and Control Register
TMRB0_FILT $B Input Filter Register
Reserved
TMRB0_ENBL $F Timer Channel Enable Register
TMRB1_COMP1 $10 Compare Register 1
TMRB1_COMP2 $11 Compare Register 2
TMRB1_CAPT $12 Capture Register
Table 4-9 Quad Timer A Registers Address Map (Continued)
(TMRA_BASE = $00 F000)
Register Acronym Address Offset Register Description
