Datasheet

Features
MC56F825x/MC56F824x Product Brief, Rev. 2
Preliminary
Freescale Semiconductor 9
— Enhanced dual edge capture functionality
— The option to supply the source for each complementary PWM signal pair from any of the
following:
– Crossbar module outputs
– External ADC input, taking into account values set in ADC high and low limit registers
2.5.2 ADC
• Two independent 12-bit analog-to-digital converters (ADCs)
—2  8 channel external inputs
— Built-in 1, 2, 4 programmable gain pre-amplifier
— Maximum ADC clock frequency up to 10 MHz
– Single conversion time of 8.5 ADC clock cycles (8.5 x 100 ns = 850 ns)
– Additional conversion time of six ADC clock cycles (6  100 ns = 600 ns)
— Sequential, parallel, and independent scan mode
— First eight samples have offset, limit, and zero-crossing calculation supported
— ADC conversions can be synchronized by eFlexPWM and timer modules via internal crossbar
module
— Support for simultaneous and software triggering conversions
— Support for multi-triggering mode with a programmable number of conversions on each trigger
2.5.3 XBAR
• Inter-module crossbar switch (XBAR)
— Programmable internal module connections between and among the eFlexPWM, ADCs, quad
timers, 12-bit DAC, CMPs, and package pins
— User-defined input/output pins for PWM fault inputs, timer input/output, ADC triggers, and
comparator outputs
2.5.4 CMP
• Three analog comparators (CMPs)
— Selectable input source includes external pins, internal DACs
— Programmable output polarity
— Output can drive timer input, eFlexPWM fault input, eFlexPWM source, and external pin
output as well as trigger ADCs
— Output falling and rising edge detection able to generate interrupts
— 32-tap programmable voltage reference per comparator