Datasheet

Configuration
56F8346 Technical Data, Rev. 15
Freescale Semiconductor 135
Preliminary
GPIOE
0 Peripheral TXD0 4
1 Peripheral RXD0 5
2 Peripheral A6 17
3 Peripheral A7 18
4 Peripheral SCLK0 130
5 Peripheral MOSI0 132
6 Peripheral MISO0 131
7 Peripheral SS0
129
8 Peripheral TC0 118
9
N/A
10 Peripheral TD0 116
11 Peripheral TD1 117
12
N/A
13 N/A
Table 8-3 GPIO External Signals Map (Continued)
Pins in shaded rows are not available in 56F8346/56F8146
Pins in italics are NOT available in the 56F8146 device
GPIO Port GPIO Bit
Reset
Function
Functional Signal Package Pin